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Date: Fri, 28 Jan 2022 03:05:08 -0300
From: Luiz Angelo Daros de Luca <luizluca@...il.com>
To: netdev@...r.kernel.org
Cc: linus.walleij@...aro.org, andrew@...n.ch, vivien.didelot@...il.com,
f.fainelli@...il.com, olteanv@...il.com, alsi@...g-olufsen.dk,
arinc.unal@...nc9.com, frank-w@...lic-files.de,
davem@...emloft.net, kuba@...nel.org,
Luiz Angelo Daros de Luca <luizluca@...il.com>
Subject: [PATCH net-next v6 12/13] net: dsa: realtek: rtl8365mb: allow non-cpu extint ports
External interfaces can be configured, even if they are not CPU ports.
The first CPU port will also be the trap port (for receiving trapped
frames from the switch).
The CPU information was dropped from chip data as it was not used
outside setup. The only other place it was used is when it wrongly
checks for CPU port when it should check for extint.
The supported modes check now uses port type and not port usage.
As a byproduct, more than one CPU can be configured. although this
might not work well with DSA setups. Also, this driver is still only
blindly forwarding all traffic to CPU port(s).
This change was not tested in a device with multiple active external
interfaces ports.
realtek_priv->cpu_port is now only used by rtl8366rb.c
Signed-off-by: Luiz Angelo Daros de Luca <luizluca@...il.com>
---
drivers/net/dsa/realtek/rtl8365mb.c | 61 ++++++++++++-----------------
1 file changed, 26 insertions(+), 35 deletions(-)
diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realtek/rtl8365mb.c
index 174496e4d736..34c99e7539e7 100644
--- a/drivers/net/dsa/realtek/rtl8365mb.c
+++ b/drivers/net/dsa/realtek/rtl8365mb.c
@@ -566,7 +566,6 @@ struct rtl8365mb_port {
* @chip_ver: chip silicon revision
* @port_mask: mask of all ports
* @learn_limit_max: maximum number of L2 addresses the chip can learn
- * @cpu: CPU tagging and CPU port configuration for this chip
* @mib_lock: prevent concurrent reads of MIB counters
* @ports: per-port data
* @jam_table: chip-specific initialization jam table
@@ -581,7 +580,6 @@ struct rtl8365mb {
u32 chip_ver;
u32 port_mask;
u32 learn_limit_max;
- struct rtl8365mb_cpu cpu;
struct mutex mib_lock;
struct rtl8365mb_port ports[RTL8365MB_MAX_NUM_PORTS];
const struct rtl8365mb_jam_tbl_entry *jam_table;
@@ -786,14 +784,6 @@ static int rtl8365mb_ext_config_rgmii(struct realtek_priv *priv, int port,
u32 val;
int ret;
- if (port != priv->cpu_port) {
- dev_err(priv->dev, "only one EXT interface is currently supported\n");
- return -EINVAL;
- }
-
- dp = dsa_to_port(priv->ds, port);
- dn = dp->dn;
-
ext_int = rtl8365mb_extint_port_map[port];
if (ext_int <= 0) {
@@ -801,6 +791,9 @@ static int rtl8365mb_ext_config_rgmii(struct realtek_priv *priv, int port,
return -EINVAL;
}
+ dp = dsa_to_port(priv->ds, port);
+ dn = dp->dn;
+
/* Set the RGMII TX/RX delay
*
* The Realtek vendor driver indicates the following possible
@@ -877,11 +870,6 @@ static int rtl8365mb_ext_config_forcemode(struct realtek_priv *priv, int port,
int val;
int ret;
- if (port != priv->cpu_port) {
- dev_err(priv->dev, "only one EXT interface is currently supported\n");
- return -EINVAL;
- }
-
ext_int = rtl8365mb_extint_port_map[port];
if (ext_int <= 0) {
@@ -946,13 +934,17 @@ static int rtl8365mb_ext_config_forcemode(struct realtek_priv *priv, int port,
static bool rtl8365mb_phy_mode_supported(struct dsa_switch *ds, int port,
phy_interface_t interface)
{
- if (dsa_is_user_port(ds, port) &&
+ int ext_int;
+
+ ext_int = rtl8365mb_extint_port_map[port];
+
+ if (ext_int < 0 &&
(interface == PHY_INTERFACE_MODE_NA ||
interface == PHY_INTERFACE_MODE_INTERNAL ||
interface == PHY_INTERFACE_MODE_GMII))
/* Internal PHY */
return true;
- else if (dsa_is_cpu_port(ds, port) &&
+ else if ((ext_int >= 1) &&
phy_interface_mode_is_rgmii(interface))
/* Extension MAC */
return true;
@@ -1755,10 +1747,8 @@ static void rtl8365mb_irq_teardown(struct realtek_priv *priv)
}
}
-static int rtl8365mb_cpu_config(struct realtek_priv *priv)
+static int rtl8365mb_cpu_config(struct realtek_priv *priv, const struct rtl8365mb_cpu *cpu)
{
- struct rtl8365mb *mb = priv->chip_data;
- struct rtl8365mb_cpu *cpu = &mb->cpu;
u32 val;
int ret;
@@ -1830,6 +1820,7 @@ static int rtl8365mb_reset_chip(struct realtek_priv *priv)
static int rtl8365mb_setup(struct dsa_switch *ds)
{
struct realtek_priv *priv = ds->priv;
+ struct rtl8365mb_cpu cpu = {0};
struct dsa_port *cpu_dp;
struct rtl8365mb *mb;
int ret;
@@ -1858,18 +1849,24 @@ static int rtl8365mb_setup(struct dsa_switch *ds)
dev_info(priv->dev, "no interrupt support\n");
/* Configure CPU tagging */
- /* Currently, only one CPU port is supported */
+ cpu.trap_port = RTL8365MB_MAX_NUM_PORTS;
dsa_switch_for_each_cpu_port(cpu_dp, priv->ds) {
- priv->cpu_port = cpu_dp->index;
- mb->cpu.mask = BIT(priv->cpu_port);
- mb->cpu.trap_port = priv->cpu_port;
- ret = rtl8365mb_cpu_config(priv);
- if (ret)
- goto out_teardown_irq;
+ cpu.mask |= BIT(cpu_dp->index);
- break;
+ if (cpu.trap_port == RTL8365MB_MAX_NUM_PORTS)
+ cpu.trap_port = cpu_dp->index;
}
+ cpu.enable = cpu.mask > 0;
+ cpu.insert = RTL8365MB_CPU_INSERT_TO_ALL;
+ cpu.position = RTL8365MB_CPU_POS_AFTER_SA;
+ cpu.rx_length = RTL8365MB_CPU_RXLEN_64BYTES;
+ cpu.format = RTL8365MB_CPU_FORMAT_8BYTES;
+
+ ret = rtl8365mb_cpu_config(priv, &cpu);
+ if (ret)
+ goto out_teardown_irq;
+
/* Configure ports */
for (i = 0; i < priv->num_ports; i++) {
struct rtl8365mb_port *p = &mb->ports[i];
@@ -1878,7 +1875,7 @@ static int rtl8365mb_setup(struct dsa_switch *ds)
continue;
/* Forward only to the CPU */
- ret = rtl8365mb_port_set_isolation(priv, i, BIT(priv->cpu_port));
+ ret = rtl8365mb_port_set_isolation(priv, i, cpu.mask);
if (ret)
goto out_teardown_irq;
@@ -2008,12 +2005,6 @@ static int rtl8365mb_detect(struct realtek_priv *priv)
mb->jam_table = rtl8365mb_init_jam_8365mb_vc;
mb->jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc);
- mb->cpu.enable = 1;
- mb->cpu.insert = RTL8365MB_CPU_INSERT_TO_ALL;
- mb->cpu.position = RTL8365MB_CPU_POS_AFTER_SA;
- mb->cpu.rx_length = RTL8365MB_CPU_RXLEN_64BYTES;
- mb->cpu.format = RTL8365MB_CPU_FORMAT_8BYTES;
-
break;
default:
dev_err(priv->dev,
--
2.34.1
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