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Date:   Mon, 6 Feb 2023 11:43:08 +0100
From:   Angelo Dureghello <angelo@...nel-space.org>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Vladimir Oltean <olteanv@...il.com>, netdev@...r.kernel.org
Subject: Re: mv88e6321, dual cpu port

Hi Andrew,

still thanks a lot,

On 24/01/23 14:57, Andrew Lunn wrote:
> On Tue, Jan 24, 2023 at 08:21:35AM +0100, Angelo Dureghello wrote:
>>
>> Hi Andrew and Vladimir,
>>
>> On Mon, 23 Jan 2023, Andrew Lunn wrote:
>>
>>>> I don't know what this means:
>>>>
>>>> | I am now trying this way on mv88e6321,
>>>> | - one vlan using dsa kernel driver,
>>>> | - other vlan using dsdt userspace driver.
>>>>
>>>> specifically what is "dsdt userspace driver".
>>>
>>> I think DSDT is Marvells vendor crap code.
>>>
>> Yes, i have seen someone succeeding using it, why do you think it's crap ?
> 
> In the Linux kernel community, that is the name given to vendor code,
> because in general, that is the quality level. The quality does vary
> from vendor to vendor and SDK to SDK, some are actually O.K.
> 
>>
>>> Having two drivers for the same hardware is a recipe for disaster.
>>>
>>>   Andrew
>>>
>>
>> What i need is something as
>>
>>          eth0 ->  vlan1 -> port5(rmii)  ->  port 0,1,2
>>          eth1 ->  vlan2 -> port6(rgmii) ->  port 3,4
>>
>> The custom board i have here is already designed in this way
>> (2 fixed-link mac-to-mac connecitons) and trying my best to have
>> the above layout working.
> 
> With todays mainline i would do:
> 
> So set eth0 as DSA master port.
> 
> Create a bridge br0 with ports 0, 1, 2.
> Create a bridge br1 with ports 3, 4, 6.
> 

This is what i am testing now, a bit different,
swapped ports 5 and 6.

#
# Configuration:
#                                   cpu      +---- port0
#              br0 eth0  <-> rgmii  port 6  -+---- port1
#                                            |
#                                            +---- port2
#
#                                  user      +---- port3
#              br1 eth1  <-> rmii  port 5   -+-----port4
#
#

mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		switch1: switch1@1d {
			compatible = "marvell,mv88e6085";
			reg = <0x1d>;
			interrupt-parent = <&lsio_gpio3>;
			interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
			interrupt-controller;
			#interrupt-cells = <2>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					label = "port0";
					phy-mode = "1000base-x";
					managed = "in-band-status";
					sfp = <&sfp_0>;
				};
				port@1 {
					reg = <1>;
					label = "port1";
					phy-mode = "1000base-x";
					managed = "in-band-status";
					sfp = <&sfp_1>;
				};
				/* This is phyenet0 now */
				port@2 {
					reg = <2>;
					label = "port2";
					phy-handle = <&switchphy2>;
				};
				port@6 {
					/* wired to cpu fec1 */
					reg = <6>;
					label = "cpu";
					ethernet = <&fec1>;
					fixed-link = <0 1 1000 0 0>;
				};
				port@3 {
					/* phy is internal to the switch */
					reg = <3>;
					label = "port3";
					phy-handle = <&switchphy3>;
				};
				port@4 {
					/* phy is internal to the switch */
					reg = <4>;
					label = "port4";
					phy-handle = <&switchphy4>;
				};
				port@5 {
					/* wired to cpu fec2 */
					reg = <5>;
					label = "port5";
					ethernet = <&fec2>;
					fixed-link = <1 1 100 0 0>;
				};
			};

All seems to work properly, but on ports 0, 1, 2 i cannot go
over 100Mbit even if master port (6) is rgmii
(testing by iperf3).

What could the reason of this limitation ?

> You don't actually make use of the br1 interface in Linux, it just
> needs to be up. You can think of eth1 being connected to an external
> managed switch.
> 
> 	Andrew

Thanks a lot,
angelo


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