netdev - Re: [PATCH net-next v2] net: dsa: mv88e6xxx: Add erratum 3.14 for 88E6390X and 88E6190X

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Wed, 19 Jul 2023 11:08:53 +0200
From: Ante Knezic <ante.knezic@...mholz.de>
To: <olteanv@...il.com>
CC: <andrew@...n.ch>, <ante.knezic@...mholz.de>, <davem@...emloft.net>,
	<edumazet@...gle.com>, <f.fainelli@...il.com>, <kuba@...nel.org>,
	<linux-kernel@...r.kernel.org>, <netdev@...r.kernel.org>, <pabeni@...hat.com>
Subject: Re: [PATCH net-next v2] net: dsa: mv88e6xxx: Add erratum 3.14 for 88E6390X and 88E6190X

> It needs to be implemented exactly as posted here? After mv88e6390_serdes_power()
> is called on any port/lane, mv88e6390x_serdes_erratum_3_14() needs to run
> for all lanes? That might be a problem.

Actually, I tested applying erratum only on requested lane in pcs_post_config and
it seems to work out fine, so we might use something like:

static int mv88e6390_erratum_3_14(struct mv88e639x_pcs *mpcs)
{
	int err;

	/* 88e6190x and 88e6390x errata 3.14:
	 * After chip reset, SERDES reconfiguration or SERDES core
	 * Software Reset, the SERDES lanes may not be properly aligned
	 * resulting in CRC errors
	 */

	err = mdiodev_c45_write(&mpcs->mdio, MDIO_MMD_PHYXS,
					 0xf054, 0x400C);
	if (err)
	        return err;

	err = mdiodev_c45_write(&mpcs->mdio, MDIO_MMD_PHYXS,
				 0xf054, 0x4000);
	if (err)
	        return err;

	return 0;
}

> Do we know if the register writes are disruptive for the ports which are
> already up and running?

I was not able to see any issues when appling the errata for already active
and running ports.