netdev - [RFC PATCH v2 net-next 11/15] net: phylink: support the 25GBase-KR-S and 25GBase-CR-S link modes too

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Date: Sat, 23 Sep 2023 16:49:00 +0300
From: Vladimir Oltean <vladimir.oltean@....com>
To: netdev@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-phy@...ts.infradead.org
Cc: "Russell King (Oracle)" <rmk+kernel@...linux.org.uk>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Andrew Lunn <andrew@...n.ch>,
	Florian Fainelli <f.fainelli@...il.com>,
	Madalin Bucur <madalin.bucur@....com>,
	Ioana Ciornei <ioana.ciornei@....com>,
	Camelia Groza <camelia.groza@....com>,
	Li Yang <leoyang.li@....com>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor@...nel.org>,
	Sean Anderson <sean.anderson@...o.com>,
	Maxime Chevallier <maxime.chevallier@...tlin.com>,
	Vinod Koul <vkoul@...nel.org>,
	Kishon Vijay Abraham I <kishon@...nel.org>
Subject: [RFC PATCH v2 net-next 11/15] net: phylink: support the 25GBase-KR-S and 25GBase-CR-S link modes too

Treat the newly introduced subsets of 25GBase-KR and 25GBase-CR the same
way as the fully-featured link modes. The difference only consists in
RS-FEC support.

Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
---
v1->v2: patch is new

 drivers/net/phy/phylink.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 6415c7b91053..157984dd81de 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -321,6 +321,8 @@ void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps)
 	if (caps & MAC_25000FD) {
 		__set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
 		__set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
+		__set_bit(ETHTOOL_LINK_MODE_25000baseCR_S_Full_BIT, linkmodes);
+		__set_bit(ETHTOOL_LINK_MODE_25000baseKR_S_Full_BIT, linkmodes);
 		__set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
 	}
 
@@ -919,6 +921,8 @@ static int phylink_parse_mode(struct phylink *pl,
 		case PHY_INTERFACE_MODE_25GBASER:
 			phylink_set(pl->supported, 25000baseCR_Full);
 			phylink_set(pl->supported, 25000baseKR_Full);
+			phylink_set(pl->supported, 25000baseCR_S_Full);
+			phylink_set(pl->supported, 25000baseKR_S_Full);
 			phylink_set(pl->supported, 25000baseSR_Full);
 			fallthrough;
 		case PHY_INTERFACE_MODE_USXGMII:
@@ -948,6 +952,8 @@ static int phylink_parse_mode(struct phylink *pl,
 		case PHY_INTERFACE_MODE_XLGMII:
 			phylink_set(pl->supported, 25000baseCR_Full);
 			phylink_set(pl->supported, 25000baseKR_Full);
+			phylink_set(pl->supported, 25000baseCR_S_Full);
+			phylink_set(pl->supported, 25000baseKR_S_Full);
 			phylink_set(pl->supported, 25000baseSR_Full);
 			phylink_set(pl->supported, 40000baseKR4_Full);
 			phylink_set(pl->supported, 40000baseCR4_Full);
-- 
2.34.1