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Date: Sun, 19 Nov 2023 18:53:37 +0000
From: Simon Horman <horms@...nel.org>
To: Ryosuke Saito <ryosuke.saito@...aro.org>
Cc: jaswinder.singh@...aro.org, ilias.apalodimas@...aro.org,
	davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
	pabeni@...hat.com, masahisa.kojima@...aro.org,
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] net: netsec: replace cpu_relax() with timeout handling
 for register checks

On Fri, Nov 17, 2023 at 05:10:02PM +0900, Ryosuke Saito wrote:
> The cpu_relax() loops have the potential to hang if the specified
> register bits are not met on condition. The patch replaces it with
> usleep_range() and netsec_wait_while_busy() which includes timeout
> logic.
> 
> Additionally, if the error condition is met during interrupting DMA
> transfer, there's no recovery mechanism available. In that case, any
> frames being sent or received will be discarded, which leads to
> potential frame loss as indicated in the comments.
> 
> Signed-off-by: Ryosuke Saito <ryosuke.saito@...aro.org>
> ---
>  drivers/net/ethernet/socionext/netsec.c | 35 ++++++++++++++++---------
>  1 file changed, 23 insertions(+), 12 deletions(-)

...

> @@ -1476,9 +1483,13 @@ static int netsec_reset_hardware(struct netsec_priv *priv,
>  	netsec_write(priv, NETSEC_REG_DMA_MH_CTRL, MH_CTRL__MODE_TRANS);
>  	netsec_write(priv, NETSEC_REG_PKT_CTRL, value);
>  
> -	while ((netsec_read(priv, NETSEC_REG_MODE_TRANS_COMP_STATUS) &
> -		NETSEC_MODE_TRANS_COMP_IRQ_T2N) == 0)
> -		cpu_relax();
> +	usleep_range(100000, 120000);
> +
> +	if ((netsec_read(priv, NETSEC_REG_MODE_TRANS_COMP_STATUS) &
> +			 NETSEC_MODE_TRANS_COMP_IRQ_T2N) == 0) {
> +		dev_warn(priv->dev,
> +			 "%s: trans comp timeout.\n", __func__);
> +	}

Hi Saito-san,

could you add some colour to how the new code satisfies the
requirements of the hardware?  In particular, the use of
usleep_range(), and the values passed to it.

>  
>  	/* clear any pending EMPTY/ERR irq status */
>  	netsec_write(priv, NETSEC_REG_NRM_TX_STATUS, ~0);
> -- 
> 2.34.1
> 

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