netdev - Re: [PATCH v6 3/3] can: xilinx_can: Add ethtool stats interface for ECC errors

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Date: Sat, 25 Nov 2023 18:04:59 +0100
From: Marc Kleine-Budde <mkl@...gutronix.de>
To: Srinivas Goud <srinivas.goud@....com>
Cc: wg@...ndegger.com, davem@...emloft.net, edumazet@...gle.com,
	kuba@...nel.org, pabeni@...hat.com, robh+dt@...nel.org,
	krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
	p.zabel@...gutronix.de, git@....com, michal.simek@...inx.com,
	linux-can@...r.kernel.org, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, appana.durga.rao@...inx.com,
	naga.sureshkumar.relli@...inx.com
Subject: Re: [PATCH v6 3/3] can: xilinx_can: Add ethtool stats interface for
 ECC errors

On 25.11.2023 16:45:33, Srinivas Goud wrote:
> Add ethtool stats interface for reading FIFO 1bit/2bit ECC errors information.
> 
> Signed-off-by: Srinivas Goud <srinivas.goud@....com>
> ---
> Changes in v6:
> None
> 
> Changes in v5:
> Address review comments
> Add get_strings and get_sset_count stats interface
> Use u64 stats helper function
> 
> Changes in v4:
> None
> 
> Changes in v3:
> None
> 
> Changes in v2:
> Add ethtool stats interface
> 
>  drivers/net/can/xilinx_can.c | 54 ++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 54 insertions(+)
> 
> diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
> index c8691a1..40c912b 100644
> --- a/drivers/net/can/xilinx_can.c
> +++ b/drivers/net/can/xilinx_can.c
> @@ -228,6 +228,7 @@ struct xcan_devtype_data {
>   * @transceiver:		Optional pointer to associated CAN transceiver
>   * @rstc:			Pointer to reset control
>   * @ecc_enable:			ECC enable flag
> + * @stats_lock:			Lock for synchronizing ECC errors stats
>   * @ecc_2bit_rxfifo_cnt:	RXFIFO 2bit ECC count
>   * @ecc_1bit_rxfifo_cnt:	RXFIFO 1bit ECC count
>   * @ecc_2bit_txolfifo_cnt:	TXOLFIFO 2bit ECC count
> @@ -254,6 +255,7 @@ struct xcan_priv {
>  	struct phy *transceiver;
>  	struct reset_control *rstc;
>  	bool ecc_enable;
> +	spinlock_t stats_lock; /* Lock for synchronizing ECC errors stats */
>  	u64_stats_t ecc_2bit_rxfifo_cnt;
>  	u64_stats_t ecc_1bit_rxfifo_cnt;
>  	u64_stats_t ecc_2bit_txolfifo_cnt;
> @@ -347,6 +349,12 @@ static const struct can_tdc_const xcan_tdc_const_canfd2 = {
>  	.tdcf_max = 0,
>  };
>  
> +static const char xcan_priv_flags_strings[][ETH_GSTRING_LEN] = {
> +	"err-ecc-rx-2-bit", "err-ecc-rx-1-bit",
> +	"err-ecc-txol-2-bit", "err-ecc-txol-1-bit",
> +	"err-ecc-txtl-2-bit", "err-ecc-txtl-1-bit",
> +};
> +
>  /**
>   * xcan_write_reg_le - Write a value to the device register little endian
>   * @priv:	Driver private data structure
> @@ -1171,6 +1179,9 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr)
>  
>  	if (priv->ecc_enable && isr & XCAN_IXR_ECC_MASK) {
>  		u32 reg_rx_ecc, reg_txol_ecc, reg_txtl_ecc;
> +		unsigned long flags;
> +
> +		spin_lock_irqsave(&priv->stats_lock, flags);

The register access doesn't have to be protected by the spinlock, only
when you touch priv->ecc_*cnt.

Marc

-- 
Pengutronix e.K.                 | Marc Kleine-Budde          |
Embedded Linux                   | https://www.pengutronix.de |
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