netdev - RE: [PATCH v2] net: stmmac: Wait a bit for the reset to take effect

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Date: Wed, 17 Jan 2024 16:55:53 +0000
From: Jose Abreu <Jose.Abreu@...opsys.com>
To: Bernd Edlinger <bernd.edlinger@...mail.de>, Andrew Lunn <andrew@...n.ch>
CC: Alexandre Torgue <alexandre.torgue@...s.st.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-stm32@...md-mailman.stormreply.com" <linux-stm32@...md-mailman.stormreply.com>,
        "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Jiri Pirko <jiri@...dia.com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Jose Abreu <Jose.Abreu@...opsys.com>
Subject: RE: [PATCH v2] net: stmmac: Wait a bit for the reset to take effect

From: Bernd Edlinger <bernd.edlinger@...mail.de>
Date: Wed, Jan 17, 2024 at 16:48:22

> I don't know at all.  And actually, I am more concerned that other registers
> might be unreliable within the first microsecond after reset is de-asserted.

Are you guaranteeing that the documented PoR time is achieved before reading registers?

> As I mentioned earlier the VHDL source code is obfuscated and I cannot
> tell anything about it, maybe people from synopsys can shed some light
> on the issue.

This ID must always be present; it should be different than zero.

Thanks,
Jose