full-disclosure - Destroying PCs remotely?

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Message-ID: <3EF23A43.5080909@snosoft.com>
From: dotslash at snosoft.com (KF)
Subject: Destroying PCs remotely?

KF wrote:
  >> Do you know what debug is?
> 
> 
> I think he is refering to the instructions used to smack the head into 
> the disk was a debug type instruction as in it may not have been ment 
> for normal day to day usage by the processor...
> 

Heres some info to support what I was trying to say... (although it may 
not directly apply to what Wood was speaking of). This data is specific 
to a Cyrix chip...

DBR0 30 + +   Debug Register
DBR1 31 +
DBR2 32 +
DBR3 33 +
  34  + - -
  38  + - -
DOR0 3C + + - -  Debug Opcode Register

DBR0 (30h) - 6x86
This is register accessed at 30h in CPU control space. DBR0 is not 
officially documented. Access to DBR0 and to other registers described 
below requires setting MAPEN field in CCR3 to 0001. Presumably the 
meaning of bits in DBR0 is as follows:
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5 - data bypassing and forwarding enable, normally set to 1
bit 6 - BTB TR access enable, must be 0 for normal operation, 1 enables 
MOV to/from TR1/2 instructions
bit 7 - used
?DBR1 (31h), ?DBR2 (32h), ?DBR3(33h)
The registers are used for performance control or CPU pipeline 
debugging. Setting to all zeros causes default CPU behavior. For 
serialization on a given opcode register 31h is loaded with 0B8h, 32h 
with 7Fh and 33h - with 0.

-KF