full-disclosure - Suggestion for IDS

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Message-ID: <433ADBCC.2000709@csuohio.edu>
Date: Wed Sep 28 19:08:43 2005
From: michael.holstein at csuohio.edu (Michael Holstein)
Subject: Suggestion for IDS

> be lucky to have a budget for a McSE (you want fries with that?)

"Fries with that" ... LMAO .. good one ;)

> (In the interests of fairness, you don't need much beefy if you're Cisco -
> the listed technical specs on the innards of the PIX-501:
> 
> Processor: 133-MHz AMD SC520 Processor
> Random access memory: 16 MB of SDRAM
> Flash memory: 8 MB
> System bus: Single 32-bit, 33-MHz PCI

And try to find a PC with this spec :

Maximum Heat Dissipation: 17.0 BTU/hr, full power usage (5W)

(you could back that one up with a 9v battery for quite some time ..)

> Comparing the rated 60Mbytes/sec with that system bus, and the fact that
> traditional designs will require at least 2 PCI accesses per (one inbound
> from ethernet to memory, and one outbound from memory to the ethernet), and
> it becomes clear that there's some major black magic - 2 PCI cycles per only
> leaves them 6MBytes/second of PCI bandwidth (and more importantly, also means
> that you need to have enough smarts to keep the inbound pipe drained and the
> outbound pipe full all the time....)

PCI bandwidth at that rate is 127.2MB/sec (big B). Cisco's figure is 
60mb/sec (litte b).

PCI figure is 32B/8b*33.3Mhz*1000000/1048576 = 127.2MB/sec.
The last part of that accounts for the decimal nature of MHz (10^6) 
versus binary nature of MB (2^20).

(Math not mine .. Google'd from 
http://www.pcguide.com/ref/mbsys/buses/funcBandwidth-c.html)

~Mike.