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Date: Fri, 17 Jun 2022 14:27:43 -0500 From: "Sierra Guiza, Alejandro (Alex)" <alex.sierra@....com> To: David Hildenbrand <david@...hat.com>, jgg@...dia.com Cc: Felix.Kuehling@....com, linux-mm@...ck.org, rcampbell@...dia.com, linux-ext4@...r.kernel.org, linux-xfs@...r.kernel.org, amd-gfx@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org, hch@....de, jglisse@...hat.com, apopple@...dia.com, willy@...radead.org, akpm@...ux-foundation.org Subject: Re: [PATCH v5 01/13] mm: add zone device coherent type memory support On 6/17/2022 12:33 PM, David Hildenbrand wrote: > On 17.06.22 19:20, Sierra Guiza, Alejandro (Alex) wrote: >> On 6/17/2022 4:40 AM, David Hildenbrand wrote: >>> On 31.05.22 22:00, Alex Sierra wrote: >>>> Device memory that is cache coherent from device and CPU point of view. >>>> This is used on platforms that have an advanced system bus (like CAPI >>>> or CXL). Any page of a process can be migrated to such memory. However, >>>> no one should be allowed to pin such memory so that it can always be >>>> evicted. >>>> >>>> Signed-off-by: Alex Sierra <alex.sierra@....com> >>>> Acked-by: Felix Kuehling <Felix.Kuehling@....com> >>>> Reviewed-by: Alistair Popple <apopple@...dia.com> >>>> [hch: rebased ontop of the refcount changes, >>>> removed is_dev_private_or_coherent_page] >>>> Signed-off-by: Christoph Hellwig <hch@....de> >>>> --- >>>> include/linux/memremap.h | 19 +++++++++++++++++++ >>>> mm/memcontrol.c | 7 ++++--- >>>> mm/memory-failure.c | 8 ++++++-- >>>> mm/memremap.c | 10 ++++++++++ >>>> mm/migrate_device.c | 16 +++++++--------- >>>> mm/rmap.c | 5 +++-- >>>> 6 files changed, 49 insertions(+), 16 deletions(-) >>>> >>>> diff --git a/include/linux/memremap.h b/include/linux/memremap.h >>>> index 8af304f6b504..9f752ebed613 100644 >>>> --- a/include/linux/memremap.h >>>> +++ b/include/linux/memremap.h >>>> @@ -41,6 +41,13 @@ struct vmem_altmap { >>>> * A more complete discussion of unaddressable memory may be found in >>>> * include/linux/hmm.h and Documentation/vm/hmm.rst. >>>> * >>>> + * MEMORY_DEVICE_COHERENT: >>>> + * Device memory that is cache coherent from device and CPU point of view. This >>>> + * is used on platforms that have an advanced system bus (like CAPI or CXL). A >>>> + * driver can hotplug the device memory using ZONE_DEVICE and with that memory >>>> + * type. Any page of a process can be migrated to such memory. However no one >>> Any page might not be right, I'm pretty sure. ... just thinking about special pages >>> like vdso, shared zeropage, ... pinned pages ... > Well, you cannot migrate long term pages, that's what I meant :) > >>>> + * should be allowed to pin such memory so that it can always be evicted. >>>> + * >>>> * MEMORY_DEVICE_FS_DAX: >>>> * Host memory that has similar access semantics as System RAM i.e. DMA >>>> * coherent and supports page pinning. In support of coordinating page >>>> @@ -61,6 +68,7 @@ struct vmem_altmap { >>>> enum memory_type { >>>> /* 0 is reserved to catch uninitialized type fields */ >>>> MEMORY_DEVICE_PRIVATE = 1, >>>> + MEMORY_DEVICE_COHERENT, >>>> MEMORY_DEVICE_FS_DAX, >>>> MEMORY_DEVICE_GENERIC, >>>> MEMORY_DEVICE_PCI_P2PDMA, >>>> @@ -143,6 +151,17 @@ static inline bool folio_is_device_private(const struct folio *folio) >>> In general, this LGTM, and it should be correct with PageAnonExclusive I think. >>> >>> >>> However, where exactly is pinning forbidden? >> Long-term pinning is forbidden since it would interfere with the device >> memory manager owning the >> device-coherent pages (e.g. evictions in TTM). However, normal pinning >> is allowed on this device type. > I don't see updates to folio_is_pinnable() in this patch. Device coherent type pages should return true here, as they are pinnable pages. > > So wouldn't try_grab_folio() simply pin these pages? What am I missing? As far as I understand this return NULL for long term pin pages. Otherwise they get refcount incremented. Regards, Alex Sierra >
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