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Message-ID: <20210818144442.GC193695@rowland.harvard.edu>
Date: Wed, 18 Aug 2021 10:44:42 -0400
From: Alan Stern <stern@...land.harvard.edu>
To: Kees Cook <keescook@...omium.org>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Arnd Bergmann <arnd@...db.de>, Al Cooper <alcooperx@...il.com>,
linux-usb@...r.kernel.org, Florian Fainelli <f.fainelli@...il.com>,
Andy Shevchenko <andy.shevchenko@...il.com>,
linux-kernel@...r.kernel.org,
bcm-kernel-feedback-list@...adcom.com,
linux-hardening@...r.kernel.org
Subject: Re: [PATCH 1/2] USB: EHCI: Add register array bounds to HCS ports
On Tue, Aug 17, 2021 at 09:30:33PM -0700, Kees Cook wrote:
> The original EHCI register struct used a trailing 0-element array for
> addressing the N_PORTS-many available registers. However, after
> commit a46af4ebf9ff ("USB: EHCI: define extension registers like normal ones")
> the 0-element array started to overlap the USBMODE extension register.
>
> To avoid future compile-time warnings about accessing indexes within a
> 0-element array, rearrange the struct to actually describe the expected
> layout (max 15 registers) with a union. All offsets remain the same, and
> bounds checking becomes possible on accesses to port_status and hostpc.
>
> There are no binary differences, and struct offsets continue to match.
Two comments...
> ---
> include/linux/usb/ehci_def.h | 24 +++++++++++++-----------
> 1 file changed, 13 insertions(+), 11 deletions(-)
>
> diff --git a/include/linux/usb/ehci_def.h b/include/linux/usb/ehci_def.h
> index 78e006355557..5398f571113b 100644
> --- a/include/linux/usb/ehci_def.h
> +++ b/include/linux/usb/ehci_def.h
> @@ -45,6 +45,7 @@ struct ehci_caps {
> #define HCS_PORTROUTED(p) ((p)&(1 << 7)) /* true: port routing */
> #define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
> #define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */
> +#define HCS_N_PORTS_MAX 0xf /* N_PORTS valid 0x1-0xF */
I would prefer to see this value in decimal. It seems very odd to say
something like "The maximum number of ports is 0xf".
>
> u32 hcc_params; /* HCCPARAMS - offset 0x8 */
> /* EHCI 1.1 addendum */
> @@ -126,8 +127,9 @@ struct ehci_regs {
> u32 configured_flag;
> #define FLAG_CF (1<<0) /* true: we'll support "high speed" */
>
> - /* PORTSC: offset 0x44 */
> - u32 port_status[0]; /* up to N_PORTS */
> + union {
> + /* PORTSC: offset 0x44 */
> + u32 port_status[HCS_N_PORTS_MAX];
Please don't lose the second comment.
> /* EHCI 1.1 addendum */
> #define PORTSC_SUSPEND_STS_ACK 0
> #define PORTSC_SUSPEND_STS_NYET 1
> @@ -164,28 +166,28 @@ struct ehci_regs {
> #define PORT_CSC (1<<1) /* connect status change */
> #define PORT_CONNECT (1<<0) /* device connected */
> #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
> -
> - u32 reserved3[9];
> -
> - /* USBMODE: offset 0x68 */
> - u32 usbmode; /* USB Device mode */
> + struct {
> + u32 reserved3[9];
> + /* USBMODE: offset 0x68 */
> + u32 usbmode; /* USB Device mode */
> + };
> #define USBMODE_SDIS (1<<3) /* Stream disable */
> #define USBMODE_BE (1<<2) /* BE/LE endianness select */
> #define USBMODE_CM_HC (3<<0) /* host controller mode */
> #define USBMODE_CM_IDLE (0<<0) /* idle state */
> -
> - u32 reserved4[6];
> + };
> + u32 reserved4;
>
> /* Moorestown has some non-standard registers, partially due to the fact that
> * its EHCI controller has both TT and LPM support. HOSTPCx are extensions to
> * PORTSCx
> */
> /* HOSTPC: offset 0x84 */
> - u32 hostpc[0]; /* HOSTPC extension */
> + u32 hostpc[HCS_N_PORTS_MAX];
> #define HOSTPC_PHCD (1<<22) /* Phy clock disable */
> #define HOSTPC_PSPD (3<<25) /* Port speed detection */
>
> - u32 reserved5[17];
> + u32 reserved5[2];
>
> /* USBMODE_EX: offset 0xc8 */
> u32 usbmode_ex; /* USB Device mode extension */
Otherwise okay.
Alan Stern
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