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Message-ID: <YdwKLwvDRfc59c8U@FVFF77S0Q05N>
Date: Mon, 10 Jan 2022 10:27:59 +0000
From: Mark Rutland <mark.rutland@....com>
To: Kees Cook <keescook@...omium.org>
Cc: Will Deacon <will@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Boqun Feng <boqun.feng@...il.com>,
Catalin Marinas <catalin.marinas@....com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-hardening@...r.kernel.org
Subject: Re: [PATCH] arm64: atomics: Dereference matching size
Hi Kees,
On Fri, Jan 07, 2022 at 03:27:46PM -0800, Kees Cook wrote:
> When building with -Warray-bounds (which is desired to be enabled
> globally), the following warning is generated:
>
> In file included from ./arch/arm64/include/asm/lse.h:16,
> from ./arch/arm64/include/asm/cmpxchg.h:14,
> from ./arch/arm64/include/asm/atomic.h:16,
> from ./include/linux/atomic.h:7,
> from ./include/asm-generic/bitops/atomic.h:5,
> from ./arch/arm64/include/asm/bitops.h:25,
> from ./include/linux/bitops.h:33,
> from ./include/linux/kernel.h:22,
> from kernel/printk/printk.c:22:
> ./arch/arm64/include/asm/atomic_lse.h:247:9: warning: array subscript 'long unsigned int[0]' is partly outside array bounds of 'atomic_t[1]' [-Warray-bounds]
> 247 | asm volatile( \
> | ^~~
> ./arch/arm64/include/asm/atomic_lse.h:266:1: note: in expansion of macro '__CMPXCHG_CASE'
> 266 | __CMPXCHG_CASE(w, , acq_, 32, a, "memory")
> | ^~~~~~~~~~~~~~
> kernel/printk/printk.c:3606:17: note: while referencing 'printk_cpulock_owner'
> 3606 | static atomic_t printk_cpulock_owner = ATOMIC_INIT(-1);
> | ^~~~~~~~~~~~~~~~~~~~
>
> This is due to the compiler seeing an unsigned long * cast against
> something (atomic_t) that is int sized. Replace the cast with the
> matching size cast. This results in no change in binary output.
Just to check, I assume both GCC and Clang are happy with this applied?
I recall that (historically at least) clang would warn about size mismatches
for inline assembly and would sometimes require more care. I don't see anythign
for which that would matter, but I just want to check.
> Cc: Will Deacon <will@...nel.org>
> Cc: Peter Zijlstra <peterz@...radead.org>
> Cc: Boqun Feng <boqun.feng@...il.com>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: linux-arm-kernel@...ts.infradead.org
> Signed-off-by: Kees Cook <keescook@...omium.org>
> ---
> arch/arm64/include/asm/atomic_lse.h | 2 +-
> arch/arm64/include/asm/cmpxchg.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/include/asm/atomic_lse.h b/arch/arm64/include/asm/atomic_lse.h
> index d955ade5df7c..5d460f6b7675 100644
> --- a/arch/arm64/include/asm/atomic_lse.h
> +++ b/arch/arm64/include/asm/atomic_lse.h
> @@ -249,7 +249,7 @@ __lse__cmpxchg_case_##name##sz(volatile void *ptr, \
> " mov %" #w "[tmp], %" #w "[old]\n" \
> " cas" #mb #sfx "\t%" #w "[tmp], %" #w "[new], %[v]\n" \
> " mov %" #w "[ret], %" #w "[tmp]" \
> - : [ret] "+r" (x0), [v] "+Q" (*(unsigned long *)ptr), \
> + : [ret] "+r" (x0), [v] "+Q" (*(u##sz *)ptr), \
> [tmp] "=&r" (tmp) \
> : [old] "r" (x1), [new] "r" (x2) \
> : cl); \
It might be worth nothing that __ll_sc__cmpxchg_case_##name##sz already uses
the same constraint:
[v] "+Q" (*(u##sz *)ptr
... since that explains why we only need to update the LSE form and not the
LL/SC form, and indicates that this is unlikely to be problematic.
Either way:
Acked-by: Mark Rutland <mark.rutland@....com>
Thanks,
Mark.
> diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h
> index f9bef42c1411..497acf134d99 100644
> --- a/arch/arm64/include/asm/cmpxchg.h
> +++ b/arch/arm64/include/asm/cmpxchg.h
> @@ -243,7 +243,7 @@ static inline void __cmpwait_case_##sz(volatile void *ptr, \
> " cbnz %" #w "[tmp], 1f\n" \
> " wfe\n" \
> "1:" \
> - : [tmp] "=&r" (tmp), [v] "+Q" (*(unsigned long *)ptr) \
> + : [tmp] "=&r" (tmp), [v] "+Q" (*(u##sz *)ptr) \
> : [val] "r" (val)); \
> }
>
> --
> 2.30.2
>
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