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Message-ID: <e6d67fca-55c0-4f16-8433-9328e928bbed@embeddedor.com>
Date: Tue, 16 Jul 2024 17:07:44 -0600
From: "Gustavo A. R. Silva" <gustavo@...eddedor.com>
To: Kees Cook <kees@...nel.org>, Peter Ujfalusi <peter.ujfalusi@...il.com>
Cc: Vinod Koul <vkoul@...nel.org>, dmaengine@...r.kernel.org,
 "Gustavo A. R. Silva" <gustavoars@...nel.org>, linux-kernel@...r.kernel.org,
 linux-hardening@...r.kernel.org
Subject: Re: [PATCH] dmaengine: ti: omap-dma: Initialize sglen after
 allocation



On 16/07/24 15:57, Kees Cook wrote:
> With the new __counted_by annocation, the "sglen" struct member must
> be set before accessing the "sg" array. This initialization was done in
> other places where a new struct omap_desc is allocated, but these cases
> were missed. Set "sglen" after allocation.
> 
> Fixes: b85178611c11 ("dmaengine: ti: omap-dma: Annotate struct omap_desc with __counted_by")
> Signed-off-by: Kees Cook <kees@...nel.org>

Reviewed-by: Gustavo A. R. Silva <gustavoars@...nel.org>

Thanks
-- 
Gustavo

> ---
> Cc: Peter Ujfalusi <peter.ujfalusi@...il.com>
> Cc: Vinod Koul <vkoul@...nel.org>
> Cc: dmaengine@...r.kernel.org
> ---
>   drivers/dma/ti/omap-dma.c | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/dma/ti/omap-dma.c b/drivers/dma/ti/omap-dma.c
> index 7e6c04afbe89..6ab9bfbdc480 100644
> --- a/drivers/dma/ti/omap-dma.c
> +++ b/drivers/dma/ti/omap-dma.c
> @@ -1186,10 +1186,10 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic(
>   	d->dev_addr = dev_addr;
>   	d->fi = burst;
>   	d->es = es;
> +	d->sglen = 1;
>   	d->sg[0].addr = buf_addr;
>   	d->sg[0].en = period_len / es_bytes[es];
>   	d->sg[0].fn = buf_len / period_len;
> -	d->sglen = 1;
>   
>   	d->ccr = c->ccr;
>   	if (dir == DMA_DEV_TO_MEM)
> @@ -1258,10 +1258,10 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_memcpy(
>   	d->dev_addr = src;
>   	d->fi = 0;
>   	d->es = data_type;
> +	d->sglen = 1;
>   	d->sg[0].en = len / BIT(data_type);
>   	d->sg[0].fn = 1;
>   	d->sg[0].addr = dest;
> -	d->sglen = 1;
>   	d->ccr = c->ccr;
>   	d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_POSTINC;
>   
> @@ -1309,6 +1309,7 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_interleaved(
>   	if (data_type > CSDP_DATA_TYPE_32)
>   		data_type = CSDP_DATA_TYPE_32;
>   
> +	d->sglen = 1;
>   	sg = &d->sg[0];
>   	d->dir = DMA_MEM_TO_MEM;
>   	d->dev_addr = xt->src_start;
> @@ -1316,7 +1317,6 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_interleaved(
>   	sg->en = xt->sgl[0].size / BIT(data_type);
>   	sg->fn = xt->numf;
>   	sg->addr = xt->dst_start;
> -	d->sglen = 1;
>   	d->ccr = c->ccr;
>   
>   	src_icg = dmaengine_get_src_icg(xt, &xt->sgl[0]);

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