linux-hardening - [PATCH 1/2] dt-bindings: i3c: Add binding for AMD I3C master controller

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Message-ID: <20250703111428.2111484-2-manikanta.guntupalli@amd.com>
Date: Thu, 3 Jul 2025 16:44:27 +0530
From: Manikanta Guntupalli <manikanta.guntupalli@....com>
To: <git@....com>, <michal.simek@....com>, <alexandre.belloni@...tlin.com>,
	<Frank.Li@....com>, <robh@...nel.org>, <krzk+dt@...nel.org>,
	<conor+dt@...nel.org>, <kees@...nel.org>, <gustavoars@...nel.org>,
	<jarkko.nikula@...ux.intel.com>, <linux-i3c@...ts.infradead.org>,
	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-hardening@...r.kernel.org>
CC: <radhey.shyam.pandey@....com>, <srinivas.goud@....com>,
	<shubhrajyoti.datta@....com>, <manion05gk@...il.com>, Manikanta Guntupalli
	<manikanta.guntupalli@....com>
Subject: [PATCH 1/2] dt-bindings: i3c: Add binding for AMD I3C master controller

Add device tree binding documentation for the AMD I3C master controller.

The controller is represented by the compatible string "xlnx,axi-i3c-1.0".
The binding specifies required properties including register space, clock,
resets, interrupts and number of i3c target devices, and provides
an example usage.

Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@....com>
---
 .../devicetree/bindings/i3c/xlnx,axi-i3c.yaml | 61 +++++++++++++++++++
 1 file changed, 61 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/i3c/xlnx,axi-i3c.yaml

diff --git a/Documentation/devicetree/bindings/i3c/xlnx,axi-i3c.yaml b/Documentation/devicetree/bindings/i3c/xlnx,axi-i3c.yaml
new file mode 100644
index 000000000000..d4ad3721096f
--- /dev/null
+++ b/Documentation/devicetree/bindings/i3c/xlnx,axi-i3c.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i3c/xlnx,axi-i3c.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: AMD I3C master
+
+maintainers:
+  - Manikanta Guntupalli <manikanta.guntupalli@....com>
+
+description:
+  The AXI-I3C IP is an I3C Controller with an AXI4-Lite interface, compatible
+  with the MIPI I3C Specification v1.1.1. The design includes bidirectional I/O
+  buffers that implement open collector drivers for the SDA and SCL signals.
+  External pull-up resistors are required to properly hold the bus at a Logic-1
+  level when the drivers are released.
+
+allOf:
+  - $ref: i3c.yaml#
+
+properties:
+  compatible:
+    const: xlnx,axi-i3c-1.0
+
+  resets:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  xlnx,num-targets:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Number of i3c target devices connected on the bus.
+    minimum: 1
+    maximum: 32
+    default: 1
+
+required:
+  - reg
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    i3c@...00000 {
+        compatible = "xlnx,axi-i3c-1.0";
+        reg = <0x80000000 0x10000>;
+        clocks = <&zynqmp_clk 71>;
+        #address-cells = <3>;
+        #size-cells = <0>;
+    };
+...
-- 
2.34.1