linux-hardening - Re: [PATCH v7 00/16] pinctrl: introduce the concept of a GPIO pin function category

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Message-ID: <aLgr30rvGBCcsOWa@smile.fi.intel.com>
Date: Wed, 3 Sep 2025 14:51:59 +0300
From: Andy Shevchenko <andriy.shevchenko@...el.com>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Bartosz Golaszewski <brgl@...ev.pl>,
	Bjorn Andersson <andersson@...nel.org>,
	Konrad Dybcio <konradybcio@...nel.org>,
	Alexey Klimov <alexey.klimov@...aro.org>,
	Lorenzo Bianconi <lorenzo@...nel.org>,
	Sean Wang <sean.wang@...nel.org>,
	Matthias Brugger <matthias.bgg@...il.com>,
	AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
	Paul Cercueil <paul@...pouillou.net>, Kees Cook <kees@...nel.org>,
	Andy Shevchenko <andy@...nel.org>,
	Andrew Morton <akpm@...ux-foundation.org>,
	David Hildenbrand <david@...hat.com>,
	Lorenzo Stoakes <lorenzo.stoakes@...cle.com>,
	"Liam R. Howlett" <Liam.Howlett@...cle.com>,
	Vlastimil Babka <vbabka@...e.cz>, Mike Rapoport <rppt@...nel.org>,
	Suren Baghdasaryan <surenb@...gle.com>,
	Michal Hocko <mhocko@...e.com>, Dong Aisheng <aisheng.dong@....com>,
	Fabio Estevam <festevam@...il.com>, Shawn Guo <shawnguo@...nel.org>,
	Jacky Bai <ping.bai@....com>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	NXP S32 Linux Team <s32@....com>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Tony Lindgren <tony@...mide.com>,
	Haojian Zhuang <haojian.zhuang@...aro.org>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	"Rafael J. Wysocki" <rafael@...nel.org>,
	Danilo Krummrich <dakr@...nel.org>,
	Neil Armstrong <neil.armstrong@...aro.org>,
	Mark Brown <broonie@...nel.org>, linux-gpio@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
	linux-mediatek@...ts.infradead.org,
	linux-arm-kernel@...ts.infradead.org, linux-mips@...r.kernel.org,
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	imx@...ts.linux.dev, linux-omap@...r.kernel.org,
	linux-renesas-soc@...r.kernel.org,
	Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
	stable@...r.kernel.org, Chen-Yu Tsai <wenst@...omium.org>,
	Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH v7 00/16] pinctrl: introduce the concept of a GPIO pin
 function category

On Wed, Sep 03, 2025 at 12:18:18AM +0200, Linus Walleij wrote:
> On Tue, Sep 2, 2025 at 1:59 PM Bartosz Golaszewski <brgl@...ev.pl> wrote:
> 
> > We have many Qualcomm SoCs (and I can imagine it's a common pattern in
> > other platforms as well) where we mux a pin to "gpio" function using the
> > `pinctrl-X` property in order to configure bias or drive-strength and
> > then access it using the gpiod API. This makes it impossible to mark the
> > pin controller module as "strict".
> >
> > This series proposes to introduce a concept of a sub-category of
> > pinfunctions: GPIO functions where the above is not true and the pin
> > muxed as a GPIO can still be accessed via the GPIO consumer API even for
> > strict pinmuxers.
> 
> This is what I want for pin control, and fixes an ages old issue
> that pin control has no intrinsic awareness of if a pin is muxed
> to a function providing GPIO.
> So patches applied!

No objections, let's move on.

> Any remaining code nitpicks can be fixed in-tree, I need this
> to be able to apply the much desired Broadcom STB driver,
> so this needs to go into -next now for cooking.
> 
> I also want to strictify some drivers using this, bringing GPIO
> function awareness into them, which is a good thing!

Well said!

-- 
With Best Regards,
Andy Shevchenko