Message-Id: <20250905-mt8196-gpufreq-v1-0-7b6c2d6be221@collabora.com>
Date: Fri, 05 Sep 2025 12:22:56 +0200
From: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, 
 Boris Brezillon <boris.brezillon@...labora.com>, 
 Steven Price <steven.price@....com>, Liviu Dudau <liviu.dudau@....com>, 
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, 
 Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, 
 David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Matthias Brugger <matthias.bgg@...il.com>, 
 MyungJoo Ham <myungjoo.ham@...sung.com>, 
 Kyungmin Park <kyungmin.park@...sung.com>, 
 Chanwoo Choi <cw00.choi@...sung.com>, Jassi Brar <jassisinghbrar@...il.com>, 
 Kees Cook <kees@...nel.org>, "Gustavo A. R. Silva" <gustavoars@...nel.org>
Cc: Chia-I Wu <olvaffe@...il.com>, Chen-Yu Tsai <wenst@...omium.org>, 
 kernel@...labora.com, dri-devel@...ts.freedesktop.org, 
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
 linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org, 
 linux-pm@...r.kernel.org, linux-hardening@...r.kernel.org, 
 Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Subject: [PATCH RFC 00/10] MT8196 GPU Frequency/Power Control Support

This series, currently an RFC, introduces two new drivers to accomplish
controlling the frequency and power of the Mali GPU on MediaTek MT8196
SoCs.

It's marked as an RFC as I want feedback on the general approach, and
because there is a clock series I need to send out first but that's
waiting for the other clock series to be accepted first in order to not
create needless confusion and conflicts.

The reason why it's not as straightforward as with other SoCs is that
the MT8196 has quite complex glue logic. There's an additional MCU
running a specialised firmware, which communicates with the application
processor through a mailbox and some SRAM, and is in charge of
controlling the regulators, the PLL clocks, and the power gating of the
GPU, all while also being in charge of any DVFS control.

This set of drivers is enough to communicate desired OPP index limits to
the aforementioned MCU, referred to as "GPUEB" from here on out. The
GPUEB is still free to lower the effective frequency if the GPU has no
jobs going on at all, even when a higher OPP is set. There's also
several more powerful OPPs it seemingly refuses to apply, possibly
because those are boost levels.

The frequency control driver lives in panthor's subdirectory, as it
registers a devfreq device for the panthor GPU device, and needs to
mingle with it somewhat closely. I've kept the tie-in parts generic
enough however to not make this a complete hack; mediatek_mfg (the
frequency control driver) registers itself as a "devfreq provider" with
panthor, and panthor picks it up during its probe function (or defers if
mediatek_mfg is not ready yet, after adding a device link first).

The mailbox driver is a fairly bog-standard common mailbox framework
driver, just specific to the firmware that runs on the GPUEB. Most of
its channels are not known, as they're either not really used apart from
debug references in downstream code, or have indecipherable downstream
code, and I lacked the necessary documentation.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
---
Nicolas Frattaroli (10):
      dt-bindings: gpu: mali-valhall-csf: add mediatek,mt8196-mali variant
      dt-bindings: devfreq: add mt8196-gpufreq binding
      dt-bindings: sram: Add compatible for mediatek,mt8196-gpufreq-sram
      dt-bindings: mailbox: Add MT8196 GPUEB Mailbox
      mailbox: add MediaTek GPUEB IPI mailbox
      drm/panthor: call into devfreq for current frequency
      drm/panthor: move panthor_devfreq struct to header
      drm/panthor: devfreq: expose get_dev_status and make it more generic
      drm/panthor: devfreq: add pluggable devfreq providers
      drm/panthor: add support for MediaTek MFlexGraphics

 .../bindings/devfreq/mediatek,mt8196-gpufreq.yaml  |  116 +++
 .../bindings/gpu/arm,mali-valhall-csf.yaml         |   36 +-
 .../mailbox/mediatek,mt8196-gpueb-mbox.yaml        |   64 ++
 Documentation/devicetree/bindings/sram/sram.yaml   |    1 +
 drivers/gpu/drm/panthor/Kconfig                    |   13 +
 drivers/gpu/drm/panthor/Makefile                   |    2 +
 drivers/gpu/drm/panthor/mediatek_mfg.c             | 1053 ++++++++++++++++++++
 drivers/gpu/drm/panthor/panthor_devfreq.c          |  136 ++-
 drivers/gpu/drm/panthor/panthor_devfreq.h          |   57 +-
 drivers/gpu/drm/panthor/panthor_device.h           |    3 -
 drivers/gpu/drm/panthor/panthor_drv.c              |    4 +-
 drivers/mailbox/Kconfig                            |   10 +
 drivers/mailbox/Makefile                           |    2 +
 drivers/mailbox/mtk-gpueb-mailbox.c                |  330 ++++++
 14 files changed, 1788 insertions(+), 39 deletions(-)
---
base-commit: 87a9e300217e33b2388b9c1ffe99ec454eb6e983
change-id: 20250829-mt8196-gpufreq-a7645670d182
prerequisite-message-id: <20250829091913.131528-1-laura.nao@...labora.com>
prerequisite-patch-id: 441c4c2e3d22f83a41241a1ab5c9be1a442f742e
prerequisite-patch-id: 852bfc3d13e2bccc4d6f4813a71c42f329dadb0c
prerequisite-patch-id: 0bc5b7bf268e88a6ef22e46c91db7645e2ce6189
prerequisite-patch-id: 442533e316e46ecd47cd0b7fb410b58fad2b3bf9
prerequisite-patch-id: 6d6d70ccb7d718b3bcca6662cdaf1e8b64b6ddc2
prerequisite-patch-id: d61046e2cd2f33024092e96e8a987b9c34c24e73
prerequisite-patch-id: c27ca28bb3df435c98fe02438264188d6fa52b7c
prerequisite-patch-id: 27fadb12ce15099a684c08d4f8c785bedc87cef2
prerequisite-patch-id: 7796ec9a0162ae96b708ea513742016657c69e14
prerequisite-patch-id: f7549078f3702acdf1e6dcd36ddebab0e543b5db
prerequisite-patch-id: b123fb15cb8c97cf0896b826820f4ce33085170c
prerequisite-patch-id: fa96e18eae90efc14e4b9f13534c013b448a3f84
prerequisite-patch-id: 1e53ad7341ddb67c9788252456068cc14ab2f610
prerequisite-patch-id: ffff2977d8f2a3a44c3606f77d38f8745cb3c60a
prerequisite-patch-id: 71d23f4f096e424ae3aa59a23695f5b1e488fab0
prerequisite-patch-id: 3c12631f22a39d6def9340ed840e9e55e1a76304
prerequisite-patch-id: caec6572d5d9a37183601b8e38f50af797df635e
prerequisite-patch-id: d5b3d5719675a1e3be26e028b5596d39e839bc09
prerequisite-patch-id: da7b826d56ac70b3b72be58d64e7c2107445478f
prerequisite-patch-id: f3f789e0d919dd92b7d811a4e11c57bb05f71617
prerequisite-patch-id: 79cca92633ca3d9cc2f1f38b6fc977a8d8543d60
prerequisite-patch-id: f663f8f3bddf198d0cab083bac7ebb88689ffc82
prerequisite-patch-id: a0ffc5b88c5eb88c491f6187672012c621bd520c
prerequisite-patch-id: e6c6d67b034d06b6158a0e0f8299ad28f0e59134
prerequisite-patch-id: 25f658fbd1238bd57e05ff299d0436f942bdcc4d
prerequisite-patch-id: 7be8439e241a320b0eb0a264a8a59a9beef383d6
prerequisite-patch-id: b903714dbe7d6a44fbe18faa02d59862ceadf217

Best regards,
-- 
Nicolas Frattaroli <nicolas.frattaroli@...labora.com>

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