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Message-ID: <e516564b-5e43-4628-836c-ff227a68d20e@oss.qualcomm.com>
Date: Mon, 3 Nov 2025 12:23:29 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Raihan Ahamed <raihan1999ahamed@...il.com>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>, Kees Cook <kees@...nel.org>,
Tony Luck <tony.luck@...el.com>,
"Guilherme G . Piccoli"
<gpiccoli@...lia.com>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-hardening@...r.kernel.org
Subject: Re: [PATCH v4 2/2] arm64: dts: qcom: msm8953-lenovo-kuntao: Add
initial device tree
On 10/31/25 2:51 PM, Raihan Ahamed wrote:
> Lenovo P2 is a handset using the MSM8953 SoC released in 2016
>
> Add a device tree with initial support for:
>
> - Enable accelerometer sensor
> - Enable pinctrl for GPIO keys
> - Enable gpu and add gpu_zap_shader
> - GPIO keys
> - SDHCI (internal and external storage)
> - USB Device Mode
> - WCNSS (WiFi/BT)
> - Regulators
>
> Signed-off-by: Raihan Ahamed <raihan1999ahamed@...il.com>
> ---
[...]
> +++ b/arch/arm64/boot/dts/qcom/msm8953-lenovo-kuntao.dts
> @@ -0,0 +1,294 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2024, Raihan Ahamed <raihan1999ahamed@...il.com>
> + */
> +/dts-v1/;
> +
> +#include "msm8953.dtsi"
> +#include "pm8953.dtsi"
> +#include "pmi8950.dtsi"
> +
> +/delete-node/ &qseecom_mem;
> +
> +/ {
> + model = "Lenovo P2";
> + compatible = "lenovo,kuntao", "qcom,msm8953";
> + chassis-type = "handset";
> + qcom,msm-id = <0x125 0x00>;
QCOM_ID_MSM8953 (dt-bindings/arm/qcom,ids.h)
> + qcom,board-id = <0x41 0x82b1 0x41 0x83b0>;
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&gpio_key_default>;
property-n
property-names
in this order, please
> +
> + key-volume-up {
> + label = "Volume Up";
> + gpios = <&tlmm 85 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEUP>;
> + debounce-interval = <15>;
> + };
> +
> + one-key-low-power {
> + label = "onekeylowpower";
> + gpios = <&tlmm 86 GPIO_ACTIVE_LOW>;
> + linux,code = <ABS_HAT1Y>;
> + debounce-interval = <15>;
> + };
> +
> + homepage {
> + label = "homepage";
> + gpios = <&tlmm 132 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_HOMEPAGE>;
> + debounce-interval = <15>;
> + gpio-key,wakeup;
> + };
Please sort these nodes without an address by their name> + };
> +
> + reserved-memory {
> + qseecom_mem: qseecom@...00000 {
> + reg = <0x0 0x84a00000 0x0 0x1900000>;
> + no-map;
> + };
> +
> + ramoops@...00000 {
> + compatible = "ramoops";
> + reg = <0x0 0x8ee00000 0x0 0x80000>;
> + console-size = <0x40000>;
> + ftrace-size = <0x15000>;
> + record-size = <0x5000>;
> + pmsg-size = <0x2000>;
Usually ecc-size = <8> is desired, as the traces are often corrupted
[...]
> +&tlmm {
> + gpio-reserved-ranges = <0 4>, <135 4>;
Any chance you know what is on these GPIOs, and could document it (e.g.
like in x1-crd.dtsi)
Konrad
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