linux-kernel - Re: [PATCH] Add SATA device to VIA IRQ quirk fixup list

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Message-Id: <1153917954.29975.22.camel@bastov.localdomain>
Date:	Wed, 26 Jul 2006 13:45:53 +0100
From:	Sergio Monteiro Basto <sergio@...giomb.no-ip.org>
To:	Alan Cox <alan@...rguk.ukuu.org.uk>
Cc:	Andrew Morton <akpm@...l.org>, Chris Wedgwood <cw@...f.org>,
	greg@...ah.com, dsd@...too.org, jeff@...zik.org, harmon@....edu,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] Add SATA device to VIA IRQ quirk fixup list

Hi, Alan 

But can we know if dev->irq is XT-PIC ?  or not ? 
or could we know if IO_APIC or LOCAL_APIC is enabled or
not ?

on linux-2.6.17/drivers/pci/quirks.c    

  * we must mask the PCI_INTERRUPT_LINE value versus 0xf to get
  * interrupts delivered properly.
  */

 static void quirk_via_irq(struct pci_dev *dev)
 {
        u8 irq, new_irq;

I want put here something like:  if ( dev->irq != XT-PIC) return and
don't quirk this dev.
        else 

        new_irq = dev->irq & 0xf;
        pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);



On Wed, 2006-07-26 at 01:42 +0100, Alan Cox wrote:
> A few comments
> 
> "The legacy IDE is using IRQ 14 or 15 not PCI"
> 
> This is half correct - V-Link is not involved in this case, however the
> legacy IRQs are configurable and steerable via func 0 reg 0x4C for some
> chips. If this has been set by a weirdass bios (bits 3-0 not 0x0100 for
> the 8233C  varies for others) then we've never supported it.
> 
> 
> I have full IRQ routing info for some of the VIA chips and it varies by
> chip how this all works.
> 
> The 8233/8233C routes via register 0x4C/0x4D of function 0 for internal
> devices and via 0x55->0x57 (polarities on 0x54) for PCI interrupts. The
> devices use the IRQ number not line. Also to add fun the 8233C has a
> 3com nic part that does this...
> 
> There are then a seperate set of register mappings for SCI and for ISA
> IRQ mapping.
> 
> There is an errata with the internal devices of the 8235 and earlier
> which can be used to detect them fairly well. Only the low four bits of
> 0ffset 0x3C are writable not the full IRQ value.
> 
> 
> Some later chips use bits to indicate PIC v APIC routing.
> 
> -
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-- 
Sérgio M.B.

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