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Message-ID: <20060730211359.GZ3662@kiste.smurf.noris.de>
Date:	Sun, 30 Jul 2006 23:13:59 +0200
From:	Matthias Urlichs <smurf@...rf.noris.de>
To:	Andi Kleen <ak@....de>
Cc:	Andrew Morton <akpm@...l.org>, john stultz <johnstul@...ibm.com>,
	linux-kernel@...r.kernel.org, torvalds@...l.org, bunk@...sta.de,
	lethal@...ux-sh.org, hirofumi@...l.parknet.co.jp,
	asit.k.mallick@...el.com
Subject: Re: REGRESSION: the new i386 timer code fails to sync CPUs

Hi,

Andi Kleen:
> > It is a "CPU0: Intel(R) Xeon(TM) CPU 3.00GHz stepping 03".
> 
> Was that on that system? I guess it could be checked for and TSC 
> be forced off. It sounds like a real CPU bug however.
> 
Board problem? After all, it has some very noxious DMI entries:

System Information
        Manufacturer: Intel Corporation
        Product Name: Nocona/Tumwater Customer Reference Board
        Version: Revision A0
        Serial Number: 0123456789
        UUID: 0A0A0A0A-0A0A-0A0A-0A0A-0A0A0A0A0A0A

... all of which are patently *wrong*.

You'd have to ask the people from Tyan what the hell they were smoking
when they blindly copied the Intel data.

At least the different CPU speed issue is a known bug, fixed by a
BIOS update. I'll postpone that until we have a working kernel fix,
for obvious reasons.

-- 
Matthias Urlichs   |   {M:U} IT Design @ m-u-it.de   |  smurf@...rf.noris.de
Disclaimer: The quote was selected randomly. Really. | http://smurf.noris.de
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