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Message-Id: <200608011910.25110.ak@suse.de>
Date:	Tue, 1 Aug 2006 19:10:25 +0200
From:	Andi Kleen <ak@...e.de>
To:	discuss@...-64.org
Cc:	Sergio Monteiro Basto <sergio@...giomb.no-ip.org>,
	torvalds@...l.org, linux-kernel@...r.kernel.org
Subject: Re: [discuss] Re: [PATCH for 2.6.18] [2/8] x86_64: On Intel systems when CPU has C3 don't use TSC


> I had some faith in this patch , but this just enable boot parameter
> notsc (which I already use). And "just" disable tsc don't solve all the
> problems.

What problems do you have?

> 
> 
> After "Using ACPI (MADT) for SMP configuration information"
> my acpi_fadt.length is great than  0
> acpi_fadt.plvl3_lat is 1001

You don't have C3 support so the patch doesn't apply to you.

> On BIOS 1.40 update description of ASRock, claims this VIA chipset have
> C1 stepping support.

C1 stepping is a processor revision; it has nothing to do with
ACPI C* power states.

-Andi
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