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Message-Id: <1157368595.30801.23.camel@localhost.localdomain>
Date:	Mon, 04 Sep 2006 12:16:35 +0100
From:	Alan Cox <alan@...rguk.ukuu.org.uk>
To:	Krzysztof Halasa <khc@...waw.pl>
Cc:	linux-kernel@...r.kernel.org, Jeff Garzik <jeff@...zik.org>
Subject: Re: 2.6.18-rc5 + pata-drivers on MSI K9N Ultra report, AMD64

Ar Sul, 2006-09-03 am 00:45 +0200, ysgrifennodd Krzysztof Halasa:
> Hmmm... is it that 0x62, isn't it?
> 
>         static struct pci_bits amd_enable_bits[] = {
>                 { 0x40, 1, 0x02, 0x02 },
>                 { 0x40, 1, 0x01, 0x01 }
>         };

The Nvidia ones have the register base at 0x50. Looking at the code I
think its just a case of adding an 0x50 based enable_bits test to
nv_pre_reset, and I'll fold that in now.




-- 
VGER BF report: U 0.474419
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