linux-kernel - Re: Uses for memory barriers

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Message-ID: <20060911190335.GB1295@us.ibm.com>
Date:	Mon, 11 Sep 2006 12:03:35 -0700
From:	"Paul E. McKenney" <paulmck@...ibm.com>
To:	Alan Stern <stern@...land.harvard.edu>
Cc:	Oliver Neukum <oliver@...kum.org>,
	David Howells <dhowells@...hat.com>,
	Kernel development list <linux-kernel@...r.kernel.org>
Subject: Re: Uses for memory barriers

On Mon, Sep 11, 2006 at 12:50:07PM -0400, Alan Stern wrote:
> On Mon, 11 Sep 2006, Paul E. McKenney wrote:
> 
> > This is a summary of the Linux memory-barrier semantics as I understand
> > them:
> > 
> > 1.	A given CPU will always perceive its own memory operations
> > 	as occuring in program order.
> > 
> > 2.	All stores to a given single memory location will be perceived
> > 	as having occurred in the same order by all CPUs.  This is
> > 	"coherence".  (And this is the property that I was forgetting
> > 	about when I first looked at your second example.)
> ...
> 
> This can't be right.  Together 1 and 2 would obviate the need for wmb().  
> The CPU doing "STORE A; STORE B" will always see the operations occuring
> in program order by 1, and hence every other CPU would always see them
> occurring in the same order by 2 -- even without wmb().

Not so.  A and B are different memory locations, hence #2 does not
apply to the "STORE A; STORE B" sequence.

> Either 2 is too strong, or else what you mean by "perceived" isn't 
> sufficiently clear.

The key phrase is "to a given -single- memory location".  ;-)

A and B are presumably -different- memory locations.  However, if A and
B are aliases for the same memory location, then the wmb() would in fact
be unnecessary.  But, again, I am assuming that they are different, so
that #2 does not apply.

						Thanx, Paul
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