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Date:	Wed, 20 Sep 2006 11:44:29 +0100
From:	Alan Cox <alan@...rguk.ukuu.org.uk>
To:	karim@...rsys.com
Cc:	Mathieu Desnoyers <compudj@...stal.dyndns.org>,
	Martin Bligh <mbligh@...gle.com>, prasanna@...ibm.com,
	Andrew Morton <akpm@...l.org>,
	"Frank Ch. Eigler" <fche@...hat.com>, Ingo Molnar <mingo@...e.hu>,
	Paul Mundt <lethal@...ux-sh.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	Jes Sorensen <jes@....com>, Tom Zanussi <zanussi@...ibm.com>,
	Richard J Moore <richardj_moore@...ibm.com>,
	Michel Dagenais <michel.dagenais@...ymtl.ca>,
	Christoph Hellwig <hch@...radead.org>,
	Greg Kroah-Hartman <gregkh@...e.de>,
	Thomas Gleixner <tglx@...utronix.de>,
	William Cohen <wcohen@...hat.com>, ltt-dev@...fik.org,
	systemtap@...rces.redhat.com
Subject: Re: [PATCH] Linux Kernel Markers

Ar Maw, 2006-09-19 am 20:52 -0400, ysgrifennodd Karim Yaghmour:
> a) the errata & a possible thread having an IP leading back within (not
>    at the start of) the range to be replaced.
> b) the errata & replacing single instruction with single instruction of
>    same size.

Intel don't distinguish. Richard's reply later in the thread answers a
lot more including what Intels architecture team said about int3 being a
specific safe case for soem reason

> I was vaguely aware of the issue on x86. Do you know if this applies the
> same on other achitectures?

I wouldn't know. 

> Also, this is SMP-only, right? (Not that single UP matters for desktop
> anymore, but just checking.)

There are some uniprocessor errata but I cannot see how you could patch
code, somehow take an interrupt (or return from one) without executing a
serializing instruction, so I likewise think its SMP only.

> Any pointers to the errata?

developer.intel.com 'specification update' documents (which are always
good reading).
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