lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Thu, 21 Sep 2006 11:14:02 -0700
From:	Bryan O'Sullivan <bos@...pentine.com>
To:	Bill Waddington <william.waddington@...zmo.com>
Cc:	linux-kernel@...r.kernel.org
Subject: Re: Flushing writes to PCI devices

On Wed, 2006-09-20 at 12:41 -0700, Bill Waddington wrote:

> Are there ever any issues with out-of-order writes from the posting
> buffer on supported architectures?

Yes.  If your device requires that writes to some locations in MMIO
space be performed in a specific order, you must explicitly do this in
your driver.  Intel CPUs will flush posted writes out of order, for
example.

	<b

-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ