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Message-ID: <adavenhgcpw.fsf@cisco.com>
Date:	Thu, 21 Sep 2006 13:56:59 -0700
From:	Roland Dreier <rdreier@...co.com>
To:	"Bryan O'Sullivan" <bos@...pentine.com>
Cc:	Bill Waddington <william.waddington@...zmo.com>,
	linux-kernel@...r.kernel.org
Subject: Re: Flushing writes to PCI devices

    Bryan> Yes.  If your device requires that writes to some locations
    Bryan> in MMIO space be performed in a specific order, you must
    Bryan> explicitly do this in your driver.  Intel CPUs will flush
    Bryan> posted writes out of order, for example.

Really?  Just normal posted PCI writes without using MTRRs or
write-combining or anything like that?

That doesn't seem right to me, and I would expect all sorts of things
to break if it were true.

 - R.
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