linux-kernel - Re: Flushing writes to PCI devices

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Thu, 21 Sep 2006 13:56:59 -0700
From:	Roland Dreier <rdreier@...co.com>
To:	"Bryan O'Sullivan" <bos@...pentine.com>
Cc:	Bill Waddington <william.waddington@...zmo.com>,
	linux-kernel@...r.kernel.org
Subject: Re: Flushing writes to PCI devices

    Bryan> Yes.  If your device requires that writes to some locations
    Bryan> in MMIO space be performed in a specific order, you must
    Bryan> explicitly do this in your driver.  Intel CPUs will flush
    Bryan> posted writes out of order, for example.

Really?  Just normal posted PCI writes without using MTRRs or
write-combining or anything like that?

That doesn't seem right to me, and I would expect all sorts of things
to break if it were true.

 - R.
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/