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Message-ID: <4523D0DC.6070704@zytor.com>
Date: Wed, 04 Oct 2006 08:18:52 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Andi Kleen <ak@...e.de>
CC: vgoyal@...ibm.com,
linux kernel mailing list <linux-kernel@...r.kernel.org>,
Reloc Kernel List <fastboot@...ts.osdl.org>,
ebiederm@...ssion.com, akpm@...l.org, horms@...ge.net.au,
lace@...kratochvil.net, magnus.damm@...il.com, lwang@...hat.com,
dzickus@...hat.com, maneesh@...ibm.com
Subject: Re: [PATCH 2/12] i386: align data section to 4K boundary
Andi Kleen wrote:
> On Tuesday 03 October 2006 19:06, Vivek Goyal wrote:
>> o Currently there is no specific alignment restriction in linker script
>> and in some cases it can be placed non 4K aligned addresses. This fails
>> kexec which checks that segment to be loaded is page aligned.
>>
>> o I guess, it does not harm data segment to be 4K aligned.
>
> iirc P4 optimization guide even recommends to keep writable data
> away one page from code to avoid some cache invalidations. But:
>
Yes, that's why the .rodata section should be in between.
It's not just the P4, either.
-hpa
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