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Message-Id: <200610111125.10902.arnd@arndb.de>
Date: Wed, 11 Oct 2006 11:25:09 +0200
From: Arnd Bergmann <arnd@...db.de>
To: Geoff Levand <geoffrey.levand@...sony.com>
Cc: jschopp <jschopp@...tin.ibm.com>,
Linas Vepstas <linas@...tin.ibm.com>, akpm@...l.org,
jeff@...zik.org, netdev@...r.kernel.org,
James K Lewis <jklewis@...ibm.com>,
linux-kernel@...r.kernel.org, linuxppc-dev@...abs.org
Subject: Re: [PATCH 21/21]: powerpc/cell spidernet DMA coalescing
On Wednesday 11 October 2006 03:46, Geoff Levand wrote:
> >
> > The others look good, but this one complicates the code and doesn't have any benefit. 20
> > for 21 isn't bad.
>
> Is the motivation for this change to improve performance by reducing the overhead
> of the mapping calls? If so, there may be some benefit for some systems. Could
> you please elaborate?
>
>From what I understand, this patch drastically reduces the number of
I/O PTEs that are needed in the iommu. With the current static IOMMU
mapping, it should only make a difference during initialization, but
any platform that uses a dynamic mapping of iommu entries will benefit
a lot from it, because:
- the card can do better prefetching of consecutive memory
- there are more I/O ptes available for other drivers.
Arnd <><
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