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Message-ID: <Pine.LNX.4.44L0.0610131355550.6612-100000@iolanthe.rowland.org>
Date: Fri, 13 Oct 2006 13:57:48 -0400 (EDT)
From: Alan Stern <stern@...land.harvard.edu>
To: Alan Cox <alan@...rguk.ukuu.org.uk>
cc: Matthew Wilcox <matthew@....cx>, Adam Belay <abelay@....EDU>,
Arjan van de Ven <arjan@...radead.org>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Greg KH <greg@...ah.com>, <linux-pci@...ey.karlin.mff.cuni.cz>,
Linux-pm mailing list <linux-pm@...ts.osdl.org>,
Kernel development list <linux-kernel@...r.kernel.org>
Subject: Re: [linux-pm] Bug in PCI core
On Fri, 13 Oct 2006, Alan Cox wrote:
> Ar Gwe, 2006-10-13 am 10:49 -0600, ysgrifennodd Matthew Wilcox:
> > No it didn't. It's undefined behaviour to perform *any* PCI config
> > access to the device while it's doing a D-state transition. It may have
>
> I think you missed the earlier parts of the story - the kernel caches
> the base config register state.
>
> > happened to work with the chips you tried it with, but more likely you
> > never hit that window because X simply didn't try to do that.
>
> Which is why the kernel caches the register state. This all came up long
> ago and the solution we currently have was the one chosen after
> considerable debate and analysis about things like locking. We preserved
> the historical reliable interface going back to the early Linux PCI
> support and used by all the apps.
Would it be okay for pci_block_user_cfg_access() to use its own cache, so
it doesn't interfere with data previously cached by pci_save_state()?
Alan Stern
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