lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Tue, 24 Oct 2006 16:36:32 -0600 From: Matthew Wilcox <matthew@....cx> To: Roland Dreier <rdreier@...co.com> Cc: Jeff Garzik <jeff@...zik.org>, linux-pci@...ey.karlin.mff.cuni.cz, linux-ia64@...r.kernel.org, linux-kernel@...r.kernel.org, openib-general@...nib.org, John Partridge <johnip@....com> Subject: Re: Ordering between PCI config space writes and MMIO reads? On Tue, Oct 24, 2006 at 02:51:30PM -0700, Roland Dreier wrote: > > I think the right way to fix this is to ensure mmio write ordering in > > the pci_write_config_*() implementations. Like this. > > I'm happy to fix this in the PCI core and not force drivers to worry > about this. > > John, can you confirm that this patch fixes the issue for you? Hang on. I wasn't thinking clearly. mmiowb() only ensures the write has got as far as the shub. There's no way to fix this in the pci core -- any PCI-PCI bridge can reorder the two. This is only really a problem for setup (when we program the BARs), so it seems silly to enforce an ordering at any other time. Reluctantly, I must disagree with Jeff -- drivers need to fix this. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists