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Message-ID: <Pine.LNX.4.58.0611061609340.22166@gandalf.stny.rr.com>
Date: Mon, 6 Nov 2006 16:17:56 -0500 (EST)
From: Steven Rostedt <rostedt@...dmis.org>
To: Benjamin Herrenschmidt <benh@...nel.crashing.org>
cc: Linus Torvalds <torvalds@...l.org>,
Oleg Nesterov <oleg@...sign.ru>,
Thomas Gleixner <tglx@...utronix.de>,
Andrew Morton <akpm@...l.org>, linux-kernel@...r.kernel.org
Subject: Re: PATCH? hrtimer_wakeup: fix a theoretical race wrt rt_mutex_slowlock()
On Tue, 7 Nov 2006, Benjamin Herrenschmidt wrote:
> On Mon, 2006-11-06 at 07:35 -0500, Steven Rostedt wrote:
>
> > It is relevant. In powerpc, can one write happen before another write?
> >
> >
> > x = 1;
> > barrier(); (only compiler barrier)
> > b = 2;
> >
> >
> > And have CPU 2 see b=2 before seeing x=1?
>
> Yes. Definitely.
OK, I see in powerpc, that spin lock calls isync. This just clears the
pipeline. It doesn't touch the loads and stores, right?
So basically saying this:
x=1;
asm ("isync");
b=2;
Would that have the same problem too? Where another CPU can see x=1
before seeing b=2?
Thanks!
-- Steve
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