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Message-ID: <20061110085728.GA14620@elte.hu>
Date: Fri, 10 Nov 2006 09:57:28 +0100
From: Ingo Molnar <mingo@...e.hu>
To: Andrew Morton <akpm@...l.org>
Cc: tglx@...utronix.de, Andi Kleen <ak@...e.de>,
john stultz <johnstul@...ibm.com>,
LKML <linux-kernel@...r.kernel.org>, Len Brown <lenb@...nel.org>,
Arjan van de Ven <arjan@...radead.org>,
Roman Zippel <zippel@...ux-m68k.org>
Subject: Re: [patch 13/19] GTOD: Mark TSC unusable for highres timers
* Andrew Morton <akpm@...l.org> wrote:
> If so, could that function use the PIT/pmtimer/etc for working out if
> the TSC is bust, rather than directly using jiffies?
there's no realiable way to figure out the TSC is bust: some CPUs have a
slight 'skew' between cores for example. On some systems the TSC might
skew between sockets. A CPU might break its TSC only once some
powersaving mode has been activated - which might be long after bootup.
The whole TSC business is a nightmare and cannot be supported reliably.
AFAIK Windows doesnt use it, so it's a continuous minefield for new
hardware to break.
We should wait until CPU makers get their act together and implement a
TSC variant that is /architecturally promised/ to have constant
frequency (system bus frequency or whatever) and which never stops.
Ingo
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