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Date:	Wed, 29 Nov 2006 15:05:44 -0800
From:	Andrew Morton <akpm@...l.org>
To:	eranian@....hp.com
Cc:	Christoph Hellwig <hch@...radead.org>,
	linux-kernel@...r.kernel.org, ak@...e.de
Subject: Re: [PATCH] i386 add idle notifier

On Wed, 29 Nov 2006 14:18:53 -0800
Stephane Eranian <eranian@....hp.com> wrote:

> Hello,
> 
> On Wed, Nov 29, 2006 at 01:09:44PM -0800, Andrew Morton wrote:
> > On Wed, 29 Nov 2006 17:09:39 +0000
> > Christoph Hellwig <hch@...radead.org> wrote:
> > 
> > > On Wed, Nov 29, 2006 at 08:25:40AM -0800, Stephane Eranian wrote:
> > > > Hello,
> > > > 
> > > > Here is a patch that adds an idle notifier to the i386 tree.
> > > > The idle notifier functionalities and implementation are
> > > > identical to the x86_64 idle notifier. We use the idle notifier
> > > > in the context of perfmon.
> > > > 
> > > > The patch is against Andi Kleen's x86_64-2.6.19-rc6-061128-1.bz2
> > > > kernel. It may apply to other kernels but it needs some updates
> > > > to poll_idle() and default_idle() to work correctly.
> > > 
> > > Walking through a notifier chain on every single interrupt (including
> > > timer interrupts) seems rather costly.  What do you need this for
> > > exactly?
> > 
> Let me give you the background on this.
> 
> In system-wide mode, perfmon wants to exclude useless kernel execution
> from being monitored. That execution is performed by the idle thread
> when it enters its lowest loop level, i.e., poll_idle(), defaut_idle(),
> mwait_idle(). It used to be that the idle loop was simply looping, waiting
> for an interrupt or polling a variable. These days, it is a bit more
> complex because on many processors, idle means going to a lower power state.
> We want to capture useful idle thread execution such as interrupt servicing
> but we want to exclude polling and low-power state.

An alternative approach might be to change perfmon so that it works out
whether it is being called by an idle thread

	if ((current->flags & PF_IDLE) && (other stuff to do with irqs?))
		return;

> We would still need the test_and_set
> to avoid a race with interrupts.

btw, I don't think anyone promised that __test_and_set_bit is atomic wrt
interrupts on all architectures.  Is OK for x86.

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