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Message-ID: <20061206192647.GW3013@parisc-linux.org>
Date: Wed, 6 Dec 2006 12:26:47 -0700
From: Matthew Wilcox <matthew@....cx>
To: Linus Torvalds <torvalds@...l.org>
Cc: Christoph Lameter <clameter@....com>,
Russell King <rmk+lkml@....linux.org.uk>,
David Howells <dhowells@...hat.com>,
Andrew Morton <akpm@...l.org>,
linux-arm-kernel@...ts.arm.linux.org.uk,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-arch@...r.kernel.org
Subject: Re: [PATCH] WorkStruct: Implement generic UP cmpxchg() where an arch doesn't support it
On Wed, Dec 06, 2006 at 11:05:22AM -0800, Linus Torvalds wrote:
> On Wed, 6 Dec 2006, Christoph Lameter wrote:
> >
> > I'd really appreciate a cmpxchg that is generically available for
> > all arches. It will allow lockless implementation for various performance
> > criticial portions of the kernel.
>
> I suspect ARM may have been the last one without one, no?
It's just been pointed out to me that the parisc one isn't safe.
<dhowells> imagine variable X is set to 3
<dhowells> CPU A issues cmpxchg(&X, 3, 5)
<dhowells> you'd expect that to change X to 5
<dhowells> but what if CPU B assigns 6 to X between cmpxchg reading X
and it setting X?
Given parisc's paucity of atomic operations (load-and-zero-32bit and
load-and-zero-64bit), cmpxchg() is impossible to implement safely.
There has to be something we can hook to exclude another processor
modifying the variable. I'm OK with using atomic_cmpxchg(); we have
atomic_set locked against it.
Of course, using cmpxchg() isn't really lockless. It's just hidden
locking.
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