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Message-ID: <20061208195949.GK31068@flint.arm.linux.org.uk>
Date: Fri, 8 Dec 2006 19:59:49 +0000
From: Russell King <rmk+lkml@....linux.org.uk>
To: Linus Torvalds <torvalds@...l.org>
Cc: David Howells <dhowells@...hat.com>,
Christoph Lameter <clameter@....com>,
Nick Piggin <nickpiggin@...oo.com.au>, akpm@...l.org,
linux-arm-kernel@...ts.arm.linux.org.uk,
linux-kernel@...r.kernel.org, linux-arch@...r.kernel.org
Subject: Re: [PATCH] WorkStruct: Implement generic UP cmpxchg() where an arch doesn't support it
On Fri, Dec 08, 2006 at 11:35:39AM -0800, Linus Torvalds wrote:
>
>
> On Fri, 8 Dec 2006, Russell King wrote:
> >
> > Yes you can. Well, you can on ARM at least. Between the load exclusive
> > you can do anything you like until you hit the store exclusive. If you
> > haven't touched the location (with anything other than another load
> > exclusive) and no other CPU has issued a load exclusive, your store
> > exclusive succeeds.
>
> Is that actually true?
>
> Almost all LL/SC implementations have granularity rules, where "touch the
> location" is not a byte-granular thing, but actually ends up being
> something like "touch the same cachline".
ARM's implementation works by using some CPU core peripheral hardware to hold
two pieces of information:
1. the physical address being accessed by the load exclusive instruction.
2. the cpu number.
When an exclusive load is performed, this hardware "remembers" bits
[31:N] (7 >= N >= 2 *) of the physical address and the CPU number.
When an exclusive store is performed, the address and CPU number are
compared to the stored versions, and the store is only allowed to succeed
if they match. Hence, it is independent of the actual cache state,
and is relatively cheap to implement.
The only instructions which affect the exclusive access state are the
exclusive access instructions themselves. Hence, to the same memory
location with the following sequence:
load exclusive
load normal
modify
store normal
store exclusive
the store exclusive _will_ succeed even though you've modified the value
in that memory location via standard loads/stores.
(* - while it is true that the physical address is stored,
implementations may themselves choose not to store between the
lower 7 to 2 bits inclusive - which incidentally means putting
two atomic_t's next together is probably a Bad Thing(tm)... and
rather sucks. However, non-exclusive accesses within that address
region do not affect the exclusive access state.)
--
Russell King
Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/
maintainer of:
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