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Message-ID: <45C8EA79.1030309@fliagreco.com.ar>
Date: Tue, 06 Feb 2007 17:52:09 -0300
From: Pablo Sebastian Greco <lkml@...agreco.com.ar>
To: Arjan van de Ven <arjan@...ux.intel.com>
CC: Marc Donner <donner@...-breitband.de>, linux-kernel@...r.kernel.org
Subject: Re: cpu load balancing problem on smp
Arjan van de Ven wrote:
> Pablo Sebastian Greco wrote:
>
>> 2296: 427 426 436 134563009 PCI-MSI-edge
>> eth1
>> 2297: 252 252 135926471 257 PCI-MSI-edge
>> eth0
>
> this suggests that cores would be busy rather than only one....
> -
Yes, but you are looking at mm kernel statistics, but if you look at the
standard kernel, you'll see that eth interrupts are on the same core
according to attached /proc/cpuinfo.
OTOH, take a look at timer interrupt distribution
View attachment "cpuinfo.txt" of type "text/plain" (3078 bytes)
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