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Message-ID: <m1wt2s8ksa.fsf@ebiederm.dsl.xmission.com>
Date: Thu, 08 Feb 2007 13:19:17 -0700
From: ebiederm@...ssion.com (Eric W. Biederman)
To: ebiederm@...ssion.com (Eric W. Biederman)
Cc: Ingo Molnar <mingo@...e.hu>, Andrew Morton <akpm@...l.org>,
linux-kernel@...r.kernel.org, "Lu, Yinghai" <yinghai.lu@....com>,
Luigi Genoni <luigi.genoni@...elli.com>,
Natalie Protasevich <protasnb@...il.com>,
Andi Kleen <ak@...e.de>
Subject: Re: [PATCH 2/2] x86_64 irq: Handle irqs pending in IRR during irq migration.
ebiederm@...ssion.com (Eric W. Biederman) writes:
> Ingo Molnar <mingo@...e.hu> writes:
>
>> * Eric W. Biederman <ebiederm@...ssion.com> wrote:
>>
>>> Ingo would it be reasonable to get a wait queue so I can wait for an
>>> irq that needs the delayed disable action to actually become masked?
>>
>> that might make sense, but what will do the wakeup - incidental IRQ
>> arriving on the new CPU? Isnt that a bit risky - maybe the device wont
>> generate IRQs for a really long time.
>
> I still need to test this, but I believe I have found a simpler
> way to avoid irr problems during migration, and I believe the code
> works equally well with either edge or level triggered interrupts.
>
> The idea is this: Instead of trying test for and handle when irr
> occurs, simply enable local interrupts after disabling and
> acknowledging the irq so that anything pending will be processed,
> before we perform the migration operation.
>
> I don't think the edge case cares about the mask/ack order but
> but masking before acking appears important for the level triggered
> case, so we might as well use that order for both.
>
> Does this look like a sane way to handle this?
The version I would up testing is below, and it doesn't work.
I still get "No irq handler for vector" warnings as well as
a couple of complaints from lock/irq debugging. The debugging
doesn't worry me. The fact that I don't have a good way to ensure
I have no more irqs in flight does.
So unless someone can find a sure way to drain the irqs in flight,
I can't migrate an irq from process context, and looking at irr and
handling a pending irq appears required. '
Eric
static void ack_apic(unsigned int irq)
{
#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
if (unlikely((irq_desc[irq].status & IRQ_MOVE_PENDING) &&
(hardirq_count() == HARDIRQ_OFFSET))) {
struct irq_desc *desc = irq_desc + irq;
desc->chip->mask(irq);
ack_APIC_irq();
/* Ensure all of the irq handlers for this irq have completed
* before we migrate it.
*/
raw_local_irq_enable();
cpu_relax();
raw_local_irq_disable();
synchronize_irq(irq);
move_masked_irq(irq);
desc->chip->unmask(irq);
return;
}
#endif
ack_APIC_irq();
}
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