linux-kernel - Re: [PATCH x86 for review III] [17/29] x86: Add new CPUID bits for AMD Family 10 CPUs in /proc/cpuinfo

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Date:	Mon, 12 Feb 2007 17:37:45 -0500
From:	Chuck Ebbert <cebbert@...hat.com>
To:	Andi Kleen <andi@...stfloor.org>
CC:	patches@...-64.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH x86 for review III] [17/29] x86: Add new CPUID bits for
 AMD Family 10 CPUs in /proc/cpuinfo

Andi Kleen wrote:

>> Since we seem to have become the place where all these are collected,
>> shouldn't we document what they mean?
> 
> This is not a data sheet and the CPU vendors have fine tech writers
> working on this already.
> 
> Also I don't really want to encourage people to hack this without
> at least taking a basic look at the documentation first.
> 
>> I've got some this machine that 
>> I'd like to know more about:
>>
>> dts ss ds_cpl est tm2 ssse3 xtpr
> 
> All documented in Intel documentation. But it's all relatively boring stuff
> 
> dts = debug trace store
> ss = self snoop
> ds_cpl = cpl qualified debug store
> est = enhanced speedstep
> tm2 = thermal monitor 2
> ssse3 = more sse3 instructions
> xtpr = tpr register chipset update control msr
> 

That's exactly what I was asking for.  Our abbreviations are too cryptic
to let someone go look up the meanings without a lot of trouble.

A one-liner for each in the comments would be just enough.

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