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Message-Id: <20070212073827.DC1A813DFC@wotan.suse.de>
Date: Mon, 12 Feb 2007 08:38:27 +0100 (CET)
From: Andi Kleen <ak@...e.de>
To: "H. Peter Anvin" <hpa@...or.com>, Andi Kleen <ak@...e.de>,
patches@...-64.org, linux-kernel@...r.kernel.org
Subject: [PATCH x86 for review II] [39/39] i386: All Transmeta CPUs have constant TSCs
From: "H. Peter Anvin" <hpa@...or.com>
All Transmeta CPUs ever produced have constant-rate TSCs.
Signed-off-by: H. Peter Anvin <hpa@...or.com>
Signed-off-by: Andi Kleen <ak@...e.de>
Cc: Andi Kleen <ak@...e.de>
Signed-off-by: Andrew Morton <akpm@...ux-foundation.org>
---
arch/i386/kernel/cpu/transmeta.c | 3 +++
1 file changed, 3 insertions(+)
Index: linux/arch/i386/kernel/cpu/transmeta.c
===================================================================
--- linux.orig/arch/i386/kernel/cpu/transmeta.c
+++ linux/arch/i386/kernel/cpu/transmeta.c
@@ -72,6 +72,9 @@ static void __cpuinit init_transmeta(str
wrmsr(0x80860004, ~0, uk);
c->x86_capability[0] = cpuid_edx(0x00000001);
wrmsr(0x80860004, cap_mask, uk);
+
+ /* All Transmeta CPUs have a constant TSC */
+ set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
/* If we can run i686 user-space code, call us an i686 */
#define USER686 (X86_FEATURE_TSC|X86_FEATURE_CX8|X86_FEATURE_CMOV)
-
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