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Message-Id: <20070222.020242.51866797.anemo@mba.ocn.ne.jp>
Date:	Thu, 22 Feb 2007 02:02:42 +0900 (JST)
From:	Atsushi Nemoto <anemo@....ocn.ne.jp>
To:	alan@...rguk.ukuu.org.uk
Cc:	linux-kernel@...r.kernel.org, akpm@...ux-foundation.org,
	ralf@...ux-mips.org
Subject: Re: [PATCH 2.6.21-rc1] serial: serial_txx9 driver update

On Wed, 21 Feb 2007 16:48:26 +0000, Alan <alan@...rguk.ukuu.org.uk> wrote:
> > +#ifdef CONFIG_CPU_TX49XX
> > +	/* TX4925 BUG WORKAROUND.  Accessing SIOC register
> > +	 * immediately after soft reset causes bus error. */
> > +	iob();
> > +	udelay(1);
> > +#endif
> 
> Given this costs 1uS in a path that is not performance critical is it
> worth putting the #ifdef/#endif in instead of having one set of code that
> works for all ?

Thank you for review.  I'll drop the #ifdef.  Also I'll replace iob()
with mmiowb() since it is MIPS specific.

> > +	while (sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST)
> > +		;
> 
> Suppose it doesn't clear ? Should also use cpu_relax() in busy loops
> so any processor variant with power management can do the right thing.

Then I'll put udelay() and a timeout counter for it.  If udelay() was
in the busy loop, cpu_relax() is still recommended?

Here is a patch on top of the previous one.  If this was OK I'll fold
it into one patch.

--- a/drivers/serial/serial_txx9.c
+++ b/drivers/serial/serial_txx9.c
@@ -277,16 +277,15 @@ static void serial_txx9_enable_ms(struct
 static void serial_txx9_initialize(struct uart_port *port)
 {
 	struct uart_txx9_port *up = (struct uart_txx9_port *)port;
+	unsigned int tmout = 10000;
 
 	sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
-#ifdef CONFIG_CPU_TX49XX
 	/* TX4925 BUG WORKAROUND.  Accessing SIOC register
 	 * immediately after soft reset causes bus error. */
-	iob();
+	mmiowb();
 	udelay(1);
-#endif
-	while (sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST)
-		;
+	while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
+		udelay(1);
 	/* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
 	sio_set(up, TXX9_SIFCR,
 		TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
-
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