linux-kernel - [PATCH 3/3] msi: Support masking msi irqs without a mask bit

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Message-ID: <m1hct7l7jz.fsf_-_@ebiederm.dsl.xmission.com>
Date:	Tue, 27 Feb 2007 12:33:20 -0700
From:	ebiederm@...ssion.com (Eric W. Biederman)
To:	Linus Torvalds <torvalds@...ux-foundation.org>
Cc:	<linux-kernel@...r.kernel.org>,
	<linux-pci@...ey.karlin.mff.cuni.cz>,
	Michael Ellerman <michael@...erman.id.au>,
	Greg Kroah-Hartman <gregkh@...e.de>
Subject: [PATCH 3/3] msi: Support masking msi irqs without a mask bit


For devices that do not support msi-x we only support 1 interrupt.  Therefore
we can disable that one interrupt by disabling the msi capability itself.  If
we leave the intx interrupts disabled while we have the msi capability disabled
no interrupts should be delivered from that device.

Devices with just the minimal msi support (and thus hitting this code path)
include things like the intel e1000 nic, so it looks like is going to be
a fairly common case and thus important to get right.

Signed-off-by: Eric W. Biederman <ebiederm@...ssion.com>
---
 drivers/pci/msi.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index c43e7d2..01869b1 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -85,6 +85,8 @@ static void msi_set_mask_bit(unsigned int irq, int flag)
 			mask_bits &= ~(1);
 			mask_bits |= flag;
 			pci_write_config_dword(entry->dev, pos, mask_bits);
+		} else {
+			msi_set_enable(entry->dev, !flag);
 		}
 		break;
 	case PCI_CAP_ID_MSIX:
-- 
1.5.0.g53756

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