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Message-Id: <1174767387.10836.107.camel@localhost.localdomain>
Date: Sun, 25 Mar 2007 06:16:27 +1000
From: Benjamin Herrenschmidt <benh@...nel.crashing.org>
To: David Howells <dhowells@...hat.com>
Cc: Lennert Buytenhek <buytenh@...tstofly.org>,
Catalin Marinas <catalin.marinas@....com>,
ARM Linux Mailing List
<linux-arm-kernel@...ts.arm.linux.org.uk>,
Dan Williams <dan.j.williams@...el.com>,
linux-kernel@...r.kernel.org, torvalds@...l.org, paulmck@...ibm.com
Subject: Re: I/O memory barriers vs SMP memory barriers
On Fri, 2007-03-23 at 13:43 +0000, David Howells wrote:
> [Resend - this time with a comma in the addresses, not a dot]
>
> Lennert Buytenhek <buytenh@...tstofly.org> wrote:
>
> > [ background: On ARM, SMP synchronisation does need barriers but device
> > synchronisation does not. The question is that given this, whether
> > mb() and friends can be NOPs on ARM or not (i.e. whether mb() is
> > supposed to sync against other CPUs or not, or whether only smp_mb()
> > can be used for this.) ]
>
> Hmmmm...
>
> I see your problem. I think the right way to deal with this is to get rid of
> mb(), rmb(), wmb() and read_barrier_depends() and replace them with io_mb(),
> io_rmb(), ...
Hrm... I'm not sure I like the io_* name, I think it's even more
confusing, people will never know when to use what ...
Maybe we should dig out again my attempt at properly defining semantics
of IO accessors and related barriers and extend it to include CPU vs.
DMA barriers.
Ben.
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