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Message-Id: <1175158720.16660.69.camel@concordia.ozlabs.ibm.com>
Date: Thu, 29 Mar 2007 18:58:40 +1000
From: Michael Ellerman <michael@...erman.id.au>
To: "Eric W. Biederman" <ebiederm@...ssion.com>
Cc: linux-pci@...ey.karlin.mff.cuni.cz,
Greg Kroah-Hartman <greg@...ah.com>,
"David S. Miller" <davem@...emloft.net>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
linux-kernel@...r.kernel.org, Andrew Morton <akpm@...l.org>,
daniel.e.wolstenholme@...el.com
Subject: Re: [PATCH 13/21] MSI: Do MSI masking in the arch code
On Wed, 2007-03-28 at 00:39 -0600, Eric W. Biederman wrote:
> Michael Ellerman <michael@...erman.id.au> writes:
>
> > It's an arch detail whether MSI irqs need to be masked using the PCI
> > MSI registers.
>
> Agreed. It isn't an arch detail that they need to be unmasked in
> the pci configuration space.
>
> I assume this patch is motivated just to make arch support easier
> and not for RTAS compatibility reason.
>
> > This changes behaviour in that previously we unconditionally masked
> > all MSIs, eventhough we only ever enable one, whereas now we only
> > mask the irqs we're using.
> >
> > To be super paranoid I have the archs mask the irq before they write
> > the msi message, just in case the device doesn't respect the MSI enable
> > bit or MSI is already enabled or something else crazy.
> >
> > For MSI-X this might mean we mask the already masked MSI-X on the device,
> > but that should be harmless.
>
> I don't think this patch really makes sense. I think we should mask
> all possible vectors for msi and msi-x initially in the generic code
> and then unmask them.
>
> If we were trying to support Dave Miller's example of hypervisors
> that don't let us touch the msi registers I think there would be a
> point. As it is I think this just makes the code more brittle.
The main motivation was to have the arch in control of as much direct
register writing as possible. Even though our HV does allow us to write
to config space, it's not obviously safe for Linux to be flipping bits
and also calling the HV to configure things. What's worse, I don't have
hardware that supports the mask bits, so I can't test it.
I also thought this would save me from having custom MSI irq_chips for
the powerpc backends. But I think I need them now anyway, so I guess
that's not a concern.
So I guess we'll drop this one, although I might try and tidy up the
implementation of "mask all MSIs" in msi_capability_init() as another
patch.
cheers
--
Michael Ellerman
OzLabs, IBM Australia Development Lab
wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
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