linux-kernel - Re: [PATCH] msi: Immediately mask and unmask msi-x irqs.

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Message-ID: <m18xd9ckn4.fsf@ebiederm.dsl.xmission.com>
Date:	Tue, 03 Apr 2007 13:39:43 -0600
From:	ebiederm@...ssion.com (Eric W. Biederman)
To:	"Siddha, Suresh B" <suresh.b.siddha@...el.com>
Cc:	Linus Torvalds <torvalds@...ux-foundation.org>,
	Greg KH <gregkh@...e.de>,
	Andrew Morton <akpm@...ux-foundation.org>,
	linux-pci@...ey.karlin.mff.cuni.cz, linux-kernel@...r.kernel.org,
	"Kok, Auke-jan H" <auke-jan.h.kok@...el.com>,
	"Williams, Mitch A" <mitch.a.williams@...el.com>
Subject: Re: [PATCH] msi: Immediately mask and unmask msi-x irqs.

"Siddha, Suresh B" <suresh.b.siddha@...el.com> writes:

> set_msi_irq_affinity() is already doing read_msi_msg(). So the mask operation
> before this should atleast get flushed before we modify the irq destination
> information.

We modify irq reception information in assign_irq_vector, before that.
With my latest delayed free of irq reception information this is less
of an issue.

Further now that we cache the msi message that read_msi_msg should go
away and we should use the cached version from the msi_desc.

> With this patch however, unmask happens immediately.

Yes unmask happens immediately as well.  Just as with Mitch Williams
last patch, and just like we expect.  Further mask/unmask should not be
called that often so there is no point in micro optimizing them.  At
least not until some screams they are a performance problem.

>> diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
>> index ad33e01..435c195 100644
>> --- a/drivers/pci/msi.c
>> +++ b/drivers/pci/msi.c
>> @@ -94,6 +94,7 @@ static void msi_set_mask_bit(unsigned int irq, int flag)
>>  		int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
>>  			PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
>>  		writel(flag, entry->mask_base + offset);
>> +		readl(entry->mask_base + offset);
>
> Don't we need the flush for the PCI_CAP_ID_MSI case aswell.

At least the 3.0 pci spec does not allow pci configuration access to
be posted.  So unless we find some hardware that actually does post
pci configuration writes we should be ok.

If we do find that hardware that posts pci config writes I expect we
will make pci config writes non posted in the generic linux pci config
functions, and only an optimized set of pci accessors functions for
drivers that really know what they are doing will export the posted
behavior.

Eric
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