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Message-ID: <38b2ab8a0704160303l7c550c2dq3b700b2e93d01a7@mail.gmail.com>
Date: Mon, 16 Apr 2007 12:03:11 +0200
From: "Francis Moreau" <francis.moro@...il.com>
To: "David Brownell" <david-b@...bell.net>
Cc: linux-kernel@...r.kernel.org
Subject: Re: question on generic gpio interface
Hi David,
Thanks for your detailed answer, it helps a lot !
On 4/14/07, David Brownell <david-b@...bell.net> wrote:
> On Friday 13 April 2007 1:51 pm, Francis Moreau wrote:
> > Hi,
> >
> > I'm trying to port my old gpio code to the generic one to see if it
> > can fit my needs.
>
> Good .. this is more like an IRQ question though.
>
yeah now it appears to me so...
>
> > The gpio controller is a home made one and has a really weird
> > interface. It has several registers to read the gpio status, to
> > configure gpio directions, or to configure if a gpio can trigger an
> > interrupt and on which event (level or edge). All gpios use the same
> > IRQ and a gpio controller register allows to read which gpio has
> > triggered the interrupt.
>
> I'll trust you on "weird", but that sounds quite typical in
> terms of functionality. You'll find that most system-on-chip
> GPIO controllers act the same way.
>
> IRQ logic on that platform must do a few things, like:
>
> - NR_IRQS includes the N interrupts triggered from that chip,
> and their numbers probably fit right sometimes after the
> core set of IRQs (which might include SOC GPIO irqs);
>
> - You'll provide an irq_chip for this controller, and it will
> handle the relevant irq operations (set trigger type, mask,
> unmask etc);
>
> - When configuring the IRQ handler for that "same IRQ", you'll
> set it up to use a chained handler that you provide, which
> reads the register to see which gpio(s) triggered the IRQ,
> maybe acks it (if just reading that register isn't enough),
> and then calls whatever handler was instaled for that GPIO.
>
> If that's not familiar to you, look at arch/arm/mach-at91/gpio.c
> or arch/arm/mach-pxa/irq.c or arch/arm/plat-omap/gpio.c or a
> number of other similar files showing how the "toplevel" IRQ
> logic will demux from a "one of these N GPIOs" interrupt down
> to the handler for that particular IRQ.
>
I think I got the picture now, thanks again.
Just to be sure I understand, it seems to me that your point 2) and 3)
are 2 different approaches to do the same thing, aren't they ?
If so I can only implement 2) since it seems to me better than the
last one (it better uses genirq layer).
Thanks !
--
Francis
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