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Message-Id: <200704200932.52181.jesse.barnes@intel.com>
Date:	Fri, 20 Apr 2007 09:32:51 -0700
From:	Jesse Barnes <jesse.barnes@...el.com>
To:	Ivan Kokshaysky <ink@...assic.park.msu.ru>
Cc:	Linus Torvalds <torvalds@...ux-foundation.org>,
	Greg KH <gregkh@...e.de>, Adam Jackson <ajackson@...hat.com>,
	linux-kernel@...r.kernel.org
Subject: Re: PCI bridge range sizing bug

On Friday, April 20, 2007 2:23 am Ivan Kokshaysky wrote:
> On Thu, Apr 19, 2007 at 05:19:20PM -0700, Linus Torvalds wrote:
> > I think we used to *never* assign PCI bus resources on x86, but
> > that thing got fixed some time ago. Now I think we only re-assign
> > them if they were unassigned *or* if the assignment wasn't working
> > before. But I'm not 100% sure about that second part... It's been
> > working so well that I don't think we've had a lot of problems with
> > resource assignment lately, and I've paged it all out of my brain.
> >
> > Ivan, can you remind my tired old brain?
>
> No :-)  You are absolutely right - we re-assign only unassigned OR
> conflicting resources. And yes, x86 kernel does accept any enabled
> bridge ranges without looking at what is on the other side of the
> bridge.
>
> I think what we need is some very minimalistic validity check for
> BIOS bridge setup: calculate sums of resource ranges of each type
> (or just MEM and PREFETCH, should we care about IO these days?)
> for devices that are behind the bridge, even without taking alignment
> requirements into account. Then, if some window is too small, we just
> let the pci_assign_unassigned_resources to take care of that.

Sounds good, hopefully reassigning the bridge resources won't cause too 
much trouble.  Do you have time to hack this up?  If not, I could give 
it a try, as long as ajax is willing to test...

Thanks,
Jesse
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