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Message-Id: <200704251616.59558.jesse.barnes@intel.com>
Date: Wed, 25 Apr 2007 16:16:59 -0700
From: Jesse Barnes <jesse.barnes@...el.com>
To: Andrew Morton <akpm@...ux-foundation.org>
Cc: Olivier Galibert <galibert@...ox.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] PCI mmconfig support for Intel 915 bridges
Keep reading...
On Wednesday, April 25, 2007 4:07 pm Andrew Morton wrote:
> On Wed, 25 Apr 2007 15:35:15 -0700 Jesse Barnes
<jesse.barnes@...el.com> wrote:
> > I see the other mmconfig stuff is upstream now, can we get this
> > added too? The Asus bug Olivier mentioned also appears to be
> > fixed, so this patch should be safe.
> >
> > Thanks,
> > Jesse
>
> ^^^^^ is an evil top-poster!
Hey I wanted to let you see the original! :)
> > On Wednesday, January 10, 2007 6:53 pm Jesse Barnes wrote:
> > > This is a resend of the patch I sent earlier to Oliver. It adds
> > > support for Intel 915 bridge chips to the new PCI MMConfig
> > > detection code. Tested and works on my sole 915 based platform
> > > (a Toshiba laptop). I added register masking per Oliver's
> > > suggestion, and moved the __init qualifier to after the 'static
> > > const char' to match Ogawa-san's recent cleanup patches.
> > >
> > > Over time we can probably associate more PCI IDs with this
> > > routine, since i915 family contains a few other chips. But since
> > > I didn't have platforms to test such additions on, they're left
> > > out for now.
> > >
> > > Signed-off-by: Jesse Barnes <jbarnes@...tuousgeek.org>
>
> Can we have a refresh, retest and resend please?
Sure. I'll try to resend tomorrow or so.
Thanks,
Jesse
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