linux-kernel - RE: Fw: [PATCH] ia64: race flushing icache in do_no

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Message-Id: <200704281830.l3SIUqOo004230@smtp.corp.google.com>
Date:	Sat, 28 Apr 2007 11:30:40 -0700
From:	Rohit Seth <rohitseth@...gle.com>
To:	"'Nick Piggin'" <nickpiggin@...oo.com.au>,
	"'Hugh Dickins'" <hugh@...itas.com>
Cc:	"'Mike Stroyan'" <mike.stroyan@...com>,
	"'Andrew Morton'" <akpm@...ux-foundation.org>,
	"'Luck, Tony'" <tony.luck@...el.com>, <linux-ia64@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>
Subject: RE: Fw: [PATCH] ia64: race flushing icache in do_no_page path

Hi Nick, 

-----Original Message-----
From: Nick Piggin [mailto:nickpiggin@...oo.com.au] 
Sent: Friday, April 27, 2007 11:03 PM
To: Hugh Dickins
Cc: rohitseth@...gle.com; Mike Stroyan; Andrew Morton; Luck, Tony;
linux-ia64@...r.kernel.org; linux-kernel@...r.kernel.org
Subject: Re: Fw: [PATCH] ia64: race flushing icache in do_no_page path

Hugh Dickins wrote:
> On Sat, 28 Apr 2007, Nick Piggin wrote:
> 
>>OIC, you need a virtual address to evict the icache, so you can't 
>>flush at flush_dcache time? Or does ia64 have an instruction to flush 
>>the whole icache? (it would be worth testing, to see how much 
>>performance suffers).
> 
> 
> I'm puzzled by that remark: the ia64 flush_icache_range always has a 
> virtual address, it uses the kernel virtual address; it takes no 
> interest in whether there's a user virtual address.

>I _think_ what it is doing is actually flushing dcache lines dirtied 
>via the kernel virtual address (yes, I think flush_icache
> in lazy_mmu_prot_update is actually just flushing the dcache, but 
>I could be wrong? [*]).

It is invalidating any entries (containing same physical address) in both I
and D caches.  Any dirty lines in D cache are written back to memory before
getting invalidated (ofcourse).

> There are supposedly no icache lines at that point[**]:

For this bug to trigger there has to be a (stale) entry in icache containing
the old contents of a page that just got updated by kernel as explicit
copying of data (DMAs are coherent on ia64, meaning if a device were to
write to memory then architecture guarnatees that both I and D caches are
invalidated).

> the bug fix at the start of this thread 
>is due to icache lines becoming present before the flush.

For this mail thread, the old contents were not flushed out of icache when
the old mapping was removed.  And they were still present when the free page
got mapped again.

Cheers,
-rohit

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