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Message-Id: <20070430154956.30E3C151CA@wotan.suse.de>
Date: Mon, 30 Apr 2007 17:49:56 +0200 (CEST)
From: Andi Kleen <ak@...e.de>
To: joachim.deguara@....com, ak@...e.de, patches@...-64.org,
linux-kernel@...r.kernel.org
Subject: [PATCH] [23/34] i386: check capability
From: "Joachim Deguara" <joachim.deguara@....com>
Currently the i386 architecture checks the family for mce capability and this
removes that and uses the CPUID information. Tested on a K8 revE and a
family10h processor.
This eliminates checking of a set AMD procesor family if mce is
allowed and relies on the information being in CPUID.
Signed-off-by: Joachim Deguara <joachim.deguara@....com>
Signed-off-by: Andi Kleen <ak@...e.de>
Cc: Andi Kleen <ak@...e.de>
Signed-off-by: Andrew Morton <akpm@...ux-foundation.org>
---
arch/i386/kernel/cpu/mcheck/k7.c | 3 +++
arch/i386/kernel/cpu/mcheck/mce.c | 3 +--
2 files changed, 4 insertions(+), 2 deletions(-)
Index: linux/arch/i386/kernel/cpu/mcheck/k7.c
===================================================================
--- linux.orig/arch/i386/kernel/cpu/mcheck/k7.c
+++ linux/arch/i386/kernel/cpu/mcheck/k7.c
@@ -75,6 +75,9 @@ void amd_mcheck_init(struct cpuinfo_x86
machine_check_vector = k7_machine_check;
wmb();
+ if (!cpu_has(c, X86_FEATURE_MCE))
+ return;
+
printk (KERN_INFO "Intel machine check architecture supported.\n");
rdmsr (MSR_IA32_MCG_CAP, l, h);
if (l & (1<<8)) /* Control register present ? */
Index: linux/arch/i386/kernel/cpu/mcheck/mce.c
===================================================================
--- linux.orig/arch/i386/kernel/cpu/mcheck/mce.c
+++ linux/arch/i386/kernel/cpu/mcheck/mce.c
@@ -38,8 +38,7 @@ void mcheck_init(struct cpuinfo_x86 *c)
switch (c->x86_vendor) {
case X86_VENDOR_AMD:
- if (c->x86==6 || c->x86==15)
- amd_mcheck_init(c);
+ amd_mcheck_init(c);
break;
case X86_VENDOR_INTEL:
-
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