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Message-ID: <46463AED.5060800@zytor.com>
Date:	Sat, 12 May 2007 15:08:45 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	"Eric W. Biederman" <ebiederm@...ssion.com>
CC:	Alexander van Heukelum <heukelum@...lshack.com>,
	"Antonino A. Daplas" <adaplas@...il.com>, Andi Kleen <ak@...e.de>,
	Andrew Morton <akpm@...l.org>,
	Matt Domsch <Matt_Domsch@...l.com>,
	Vivek Goyal <vgoyal@...ibm.com>,
	James Bottomley <James.Bottomley@...senPar>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: x86 setup rewrite tree ready for flamage^W review

Eric W. Biederman wrote:
> Ok.  If you have tested on a wide variety of machines then I won't
> worry about it.
> 
> I guess if a cr0 write has always been synchronizing things should be
> a safe practice.  The practical danger is if you write to cr0 and the
> pipeline is not flushed and the segment loads might execute as 16bit
> mode segment register loads.  I think this is more of a 486 or 586/Pentium
> danger actually then a 386 one.

Writes to CR0 are synchronizing and are documented as such.  This is a
fairly trivial consequence of it invoking microcode on every x86 ever
created.

> Hmm. I'm not certain about enabling protected mode but enabling paging
> at least does appear to be documented to require a jump, before the P6
> core.  Which may be why it is recommended for initializing protected
> mode.

Enabling paging is possibly a different matter.  I can't speak on that
particular subject with any authority.

	-hpa
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