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Message-ID: <464DAD06.2060504@ru.mvista.com>
Date: Fri, 18 May 2007 17:41:26 +0400
From: Sergei Shtylyov <sshtylyov@...mvista.com>
To: Benjamin Herrenschmidt <benh@...nel.crashing.org>
Cc: Dave Liu <r63238@...escale.com>, linuxppc-dev@...abs.org,
tglx@...utronix.de, mingo@...e.hu, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2.6.21-rt2] PowerPC: decrementer clockevent driver
Hello.
Benjamin Herrenschmidt wrote:
>>>>Yes, on some implementations there can be other conditions that
>>>>make a decrementer exception go away; there is no contradiction
>>>>here (thankfully). My wording was sloppy.
>>>Some CPUs have the DEC exceptions basically edge triggered (yeah I know
>>for example?
>>>it sucks). That's why, among others, the IRQ soft-disable code has code
>>>to re-trigger DEC exceptions ASAP (by setting it to 1.. note that we
>>>could probably use 0 here, we've been a bit conservative).
Yeah, the classic decrementer is programmed off-by-one.
> I'm not 100% certain... Paulus thinks all the old 6xx are like that, and
> maybe POWER4. If I look at the oldest BookIV I can find (the 601), it
From the "PowerPC Operating Environment Architecture" that I've already
quoated t follows that POWER4-compatible decremented exception *must* be edge
triggered.
> says that an exception is generated when the MSB transitions from 0 to
> 1. It's not clear wether the exception sticks while that bit is 1 or is
Freescale MPC 7450 manual says the same, for example.
> indeed considered as an "edge" event that gets cleared as soon as
> delivered.
> Ben.
WBR, Sergei
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